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| 型號： | DS89C430 |
| 英文描述： | Ultra-High-Speed Flash Microcontrollers |
| 中文描述： | 超高速閃存微控制器 |
| 文件頁數(shù)： | 23/48頁 |
| 文件大?。?/td> | 934K |
| 代理商： | DS89C430 |
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DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers
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Note:
The read/write accessibility of the flash memory during in-application programming is not affected by the
state of the lock bits. However, the lock bits do affect the read/write accessibility in ROM loader and parallel
programming modes.
In-Application Programming by User Software
The DS89C430 supports in-application programming of on-chip flash memory by user software. In-application
programming is initiated by writing a flash command into the flash control (FCNTL:D5h) register to enable the flash
memory for erase/program/verify operations. Address and data are input into the MMU through the flash data
(FDATA:D6h) register. The flash command also enables read/write accesses to the FDATA. The MMU’s sequencer
provides the operation sequences and control functions to the flash memory. The MMU is designed to operate
independently from the processor, except for read/write access to the SFRs.
Only the upper bank of the on-chip program memory can be in-application programmed by the user software. The
lower bank of the on-chip program memory contains system hardware-dependent codes that are crucial to system
operation and should not be altered during in-application programming.
All flash operations are self-timed. The user software can monitor the progress of an erase or programming
operation through the flash busy (FBUSY;FCNTL.7) bit with a reset value at logic 1. A selected operation
automatically starts when required data is written to the FDATA SFR. The MMU clears the FBUSY bit to indicate
the start of a write/erase operation. The FBUSY bit may not change state for up to 1 s after the operation is
requested. During this time, the application should poll the status of the FBUSY bit waiting for it to change state.
This bit is held low until either the end of the operation or until an error indicator is returned. A flash operating
failure terminates the current operation and sets the flash error flag (FERR;FCNTL.6) to logic 1. Both the busy and
error flags are read-only bits.
Read/write access during in-application programming is not affected by the state of the lock bits.
The flash command (FC3–FC0;FCNTL.3:0) bits provide flash commands as listed in
Table 4
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS89C440 | Ultra-High-Speed Flash Microcontrollers |
| DS89C450 | Ultra-High-Speed Flash Microcontrollers |
| DS89C21TMX | Transceiver |
| DSDK101 | Low-Cost Demo Kit Motherboard |
| E.FL-LP-040 | CABLE ; Connector type A:MFD-Titan; Connector type B:MFD-Titan; Length, lead:5m |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS89C430_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Ultra-High-Speed Flash Microcontrollers |
| DS89C430+ENG | 制造商:Maxim Integrated Products 功能描述:MCU 8BIT CISC 16KB FLASH 5V 44TQFP - Trays |
| DS89C430+ENL | 制造商:Maxim Integrated Products 功能描述:MICRO HS 44P TQFP 33MHZ IND PB-FREE - Trays |
| DS89C430+MNL | 制造商:Maxim Integrated Products 功能描述:MCU 8BIT CISC 16KB FLASH 5V 40PDIP - Rail/Tube |
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