參數(shù)資料
型號： DS33Z11
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 網(wǎng)絡接口
英文描述： Ethernet Mapper
中文描述： DATACOM, NETWORK INTERFACE SUPPORT CIRCUIT, PBGA169
封裝： 14 X 14 MM, 1 MM PITCH, CSBGA-169
文件頁數(shù)： 91/169頁
文件大?。?/td> 1049K
代理商： DS33Z11
DS33Z11 Ethernet Mapper
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Manual Error Insert Mode Select (MEIMS)
– When 0, the transmit manual error insertion signal (TMEI)
will not cause errors to be inserted. When 1, TMEI will cause an error to be inserted when it transitions from a 0 to
a 1. Note: Enabling TMEI does not disable error insertion using TCER[6:0] and TCEN[7:0].
91 of 169
LI.TEPHC
Transmit Errored Packet High Control Register
0C7h
7
6
5
4
3
2
1
0
MEIMS
0
TPER6
0
TPER5
0
TPER4
0
TPER3
0
TPER2
0
TPER1
0
TPER0
0
Bits 0 – 6: Transmit Errored Packet Insertion Rate (TPER[6:0])
– These seven bits indicate the rate at which
errored packets are to be output. One out of every x * 10
packets is to be an errored packet. TPER[3:0] is the
value x, and TPER[6:4] is the value y which has a maximum value of 6. If TPER[3:0] has a value of 0h errored
packet insertion is disabled. If TPER[6:4] has a value of 6xh or 7xh the errored packet rate is x * 10
. A TPER[6:0]
value of 01h results in every packet being errored. A TPER[6:0] value of 0Fh results in every 15
th
packet being
errored. A TPER[6:0] value of 11h results in every 10
packet being errored.
To initiate automatic error insertion, use the following routine:
1)
2)
3)
LI.TPPSR.TEPF bit for completion of the error insertion. If interrupt on completion of error insertion is enabled
(LI.TPPSRIE.TEPFIE = 1), the user only needs to wait for the interrupt condition.
4)
Proceed with the cleanup routine listed below.
Configure LI.TEPLC and LI.TEPHC for the desired error insertion mode.
Write the LI.TPPCL.TIAEI bit to 1. Note that this bit is write-only.
If not using continuous error insertion (LI.TPELC is not equal to FFh), the user should monitor the
Cleanup routine:
1) Write LI.TEPLC and LI.TEPHC each to 00h.
2) Write the LI.TPPCL.TIAEI bit to 0.
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