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參數(shù)資料
| 型號： | DS2152 |
| 英文描述： | Enhanced T1 Single-Chip Transceiver |
| 中文描述： | 增強型T1單芯片收發(fā)器 |
| 文件頁數(shù)： | 70/94頁 |
| 文件大?。?/td> | 1003K |
| 代理商： | DS2152 |
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DS2152
70 of 93
Each of the bit positions in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represent a DS0
channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent (or
clear). If a DS0 is programmed to be clear, no robbed-bit signaling will be inserted nor will the channel
have Bit 7 stuffing performed. However, in the D4 framing mode, bit 2 will be overwritten by a 0 when a
Yellow Alarm is transmitted. Also, the user has the option to prevent the TTR registers from determining
which channels are to have Bit 7 stuffing performed. If the TCR2.0 and TCR1.3 bits are set to 1, then all
24 T1 channels will have Bit 7 stuffing performed on them regardless of how the TTR registers are
programmed. In this manner, the TTR registers are only affecting which channels are to have robbed-bit
signaling inserted into them. Please see Figure 15-11 for more details.
14.0 LINE INTERFACE FUNCTION
The line interface function in the DS2152 contains three sections; (1) the receiver which handles clock
and data recovery, (2) the transmitter which waveshapes and drives the T1 line, and (3) the jitter
attenuator. Each of these three sections is controlled by the Line Interface Control Register (LICR), which
is described below.
LICR: LINE INTERFACE CONTROL REGISTER
(Address=7C Hex)
(MSB) (LSB)
L2
L1
L0
EGL
JAS
JABDS
DJA
TPD
LICR
SYMBOL
POSITION
NAME AND DESCRIPTION
L2
LICR.7
Line Build Out Select Bit 2.
Sets the transmitter build out; see
the Table 14-2
Line Build Out Select Bit 1.
Sets the transmitter build out; see
the Table 14-2
Line Build Out Select Bit 0.
Sets the transmitter build out; see
the Table 14-2
Receive Equalizer Gain Limit.
0 = -36 dB
1 = -30 dB
Jitter Attenuator Select.
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
Jitter Attenuator Buffer Depth Select
0 = 128 bits
1 = 32 bits (use for delay sensitive applications)
Disable Jitter Attenuator.
0 = jitter attenuator enabled
1 = jitter attenuator disabled
Transmit Power Down.
0 = normal transmitter operation
1 = powers down the transmitter and 3-states the TTIP and
TRING pins
L1
LICR.6
L0
LICR.5
EGL
LICR.4
JAS
LICR.3
JABDS
LICR.2
DJA
LICR.1
TPD
LICR.0
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| DS2160QN | Peripheral IC |
| DS2165QL | Solid-State Recorder |
| DS2165QN | Solid-State Recorder |
| DS2167N | Transcoder |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS2152DK | 功能描述:KIT DESIGN DS2152 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產零件編號 系列:- 標準包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關產品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| DS2152L | 功能描述:網絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2152L+ | 功能描述:網絡控制器與處理器 IC Enhanced T1 Transceiver RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2152L-ES | 制造商:DALL 功能描述: |
| DS2152LN | 功能描述:網絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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