參數(shù)資料
型號： DS21352LN
英文描述： 3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers
中文描述： 3.3 DS21352及5V DS21552 T1單芯片收發(fā)器
文件頁數(shù)： 36/137頁
文件大?。?/td> 1094K
代理商： DS21352LN
DS21352/DS21552
36 of 137
3. All receive side signals will take on timing synchronous with TCLK instead of RCLKI.
Please note that it is not acceptable to have RCLK tied to TCLK during this loopback because this
will cause an unstable condition.
CCR2: COMMON CONTROL REGISTER 2 (Address=38 Hex)
(MSB)
TFM
(LSB)
RZSE
TB8ZS
TSLC96
TFDL
RFM
RB8ZS
RSLC96
SYMBOL
POSITION
NAME AND DESCRIPTION
TFM
CCR2.7
Transmit Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
Transmit B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
Transmit SLC–96 / Fs–Bit Insertion Enable.
Only set this bit to a one in D4 framing
applications. Must be set to one to source the Fs pattern from the TFDL register. See
Section 15.5 for details.
0 = SLC–96/Fs–bit insertion disabled
1 = SLC–96/Fs–bit insertion enabled
Transmit FDL Zero Stuffer Enable.
Set this bit to zero if using the internal
HDLC/BOC controller instead of the legacy support for the FDL. See Section 15 for
details.
0 = zero stuffer disabled
1 = zero stuffer enabled
Receive Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
Receive B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
Receive SLC–96 Enable.
Only set this bit to a one in D4/SLC–96 framing
applications. See Section 15.5 for details.
0 = SLC–96 disabled
1 = SLC–96 enabled
Receive FDL Zero Destuffer Enable.
Set this bit to zero if using the internal
HDLC/BOC controller instead of the legacy support for the FDL. See Section 15.4 for
details.
0 = zero destuffer disabled
1 = zero destuffer enabled
CCR3: COMMON CONTROL REGISTER 3 (Address=30 Hex)
TB8ZS
CCR2.6
TSLC96
CCR2.5
TFDL
CCR2.4
RFM
CCR2.3
RB8ZS
CCR2.2
RSLC96
CCR2.1
RZSE
CCR2.0
(MSB)
RESMDM
(LSB)
TESMDM
TCLKSRC
RLOSF
RSMS
PDE
ECUS
TLOOP
SYMBOL
POSITION
NAME AND DESCRIPTION
RESMDM
CCR3.7
Receive Elastic Store Minimum Delay Mode.
See Section 14.4 for details.
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32–bit depth
Transmit Clock Source Select.
This function allows the user to internally select
RCLK as the clock source for the transmit side formatter.
0 = Source of transmit clock determined by TCR1.7 (LOTCMC)
1 = Force transmitter to internally switch to RCLK as source of transmit clock. Signal
at TCLK pin is ignored
Function of the RLOS/LOTC Output.
0 = Receive Loss of Sync (RLOS)
TCLKSRC
CCR3.6
RLOSF
CCR3.5
相關(guān)PDF資料
PDF描述
DS21552L 3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers
DS21552LN 3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers
DS21354 MTTF is frequently used interchangeably with MTBF
DS21354L 3.3V/5V E1 Single-Chip Transceivers
DS21354LN 3.3V/5V E1 Single-Chip Transceivers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21352LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Single Chip Transceivers RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21354 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V/5V E1 Single-Chip Transceivers
DS21354DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS21354 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS21354G 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21354GN 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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