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參數(shù)資料
| 型號(hào)： | DNCM00 |
| 廠商： | Lineage Power |
| 英文描述： | 10 Mbit/s Ethernet MAC ASIC Macrocell(10 M位/秒以太網(wǎng)MAC ASIC宏單元) |
| 中文描述： | 10 Mbit / s的以太網(wǎng)MAC ASIC的宏單元（位10米/秒以太網(wǎng)的MAC ASIC的宏單元） |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 73K |
| 代理商： | DNCM00 |
Advance Data Sheet
August 1996
DNCM00
10 Mbit/s Ethernet MAC ASIC Macrocell
Lucent Technologies Inc.
7
4
Functional Description
(continued)
Transmitter
(continued)
At the end of preamble the DNCM00 sends a one TXC
signal, TXLD, to the host. The DNCM00 strobes in the
byte to be transmitted on the falling edge of TXLD. After
the first TXLD, subsequent requests will be sent every
eight TXC cycles. After the last byte has been sent by
the host, the host will signify end of data by activating
TXEOD for one TXC. After transmitting the last byte,
the DNCM00 will append the CRC to the data stream if
the CRC input to the DNCM00 is high. The CRC can
also be sent inverted if desired (to force a bad CRC) by
setting the INVCRC input high. After completing trans-
mission, the DNCM00 will send a TXEOP signal to the
host. All transmit statistics (SCOL, MCOL, CERR,
ABORTED, EXDEF, etc.) except SQE can be latched
on the falling edge of TXEOP. During transmission, the
DNCM00 will activate TXBYTE for one TXC for each
byte it sends. For an N-byte packet, the DNCM00 will
send N + 4 TXBYTE signals if CRC was appended.
After successful transmission, the DNCM00 will
monitor the COL input for an SQE test signal if the
ISQE input is low. COL is monitored for the first 6.4
μ
s
of intergap time. If SQE test is not observed, the SQE
output will be set to 1 and held until the next TXSOP
signal. A control output SQEVALID will be valid from
6.4
μ
s until TXSOP of the next packet, and SQE is valid
when SQEVALID is high.
If another TXREQ is sent before 6.4
μ
s of intergap, the
DNCM00 will attempt to transmit the new packet
regardless of CRS. CRS will normally not activate
during this time if all stations are observing proper
protocol, so this should be an infrequent event.
The DNCM00 handles collision situations in accor-
dance with 802.3. The RETRY[1:0] inputs select 1, 4, 8,
or 16 attempts to transmit, with 00 giving the standard
16 attempts. The standard backoff algorithm is used.
The DNCM00 has a 12-bit pseudorandom shift register
counter that free runs. The counter can be frozen for
periods of time by driving the MODRNDM input high.
This signal can be a decoded chip enable or some
other unique signal to increase the randomness of a
group of ATTMACS. When a collision is sensed, a 32-
bit jam pattern (1111) is transmitted. After jam is
complete, n bits of the counter (n depends on the colli-
sion number) is dumped into a 10-bit counter, which in
turn is decremented by the turnover of the 51.2
μ
s
timer. Backoff lasts until the 10-bit counter reaches 0.
Transmission is reattempted if the 9.6
μ
s timer has
expired or is deferred until CRS deactivates and the 9.6
μ
s timer expires. If a deferral lasts longer than
24,288 bit times, the DNCM00 will abort the transmis-
sion if the DEFER input is set high. This also applies to
a deferral at the start of a regular transmission. Deferral
is not cumulative; it restarts from 0 each time a deferral
state is entered. If a packet cannot be transmitted after
making the selected number of attempts, the transmit
is aborted and the CERR output is activated. If a colli-
sion occurs during preamble, the preamble-SFD
sequence is completed prior to jamming.
The COLDET output indicates the presence of a colli-
sion situation to the host. If a late collision (after 512 bit
times, including preamble and SFD) occurs, the LATE
output will be set high. The MAC does not abort after a
late collision is detected. This must be done by the
host. If the DNCM00 detects a collision while transmit-
ting, it will always send a jam pattern prior to deacti-
vating TXE regardless of the status of ABORT, TXEOD,
or the status of the collision counter. The host should
always reset its transmit stack if the COLDET output
goes high to ensure complete packet transmission.
The BSEL input can be used to override the backoff
timer if desired. If BSEL is 1 and a collision is detected,
the DNCM00 will jam and retransmit when the 9.6
μ
s
IGT has expired. If the MFDUP is high (full-duplex
mode), the DNCM00 ignores the collision signal.
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