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參數(shù)資料
| 型號： | DM9801A |
| 文件頁數(shù)： | 36/60頁 |
| 文件大小： | 605K |
| 代理商： | DM9801A |
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DM9801A
1M Home Phoneline Network Physical Layer Single Chip Transceiver
SPI Serial Management Status Register - Register 2
(continued)
(INTFSEL = 1, GPSI Mode)
Bit
Bit Name
Default
2.4
RX_VER
0, RO
Receive Version:
This bit is an indication of the current receive version.
1= The receive version is not version 0.
0= The receive version is version 0.
2.3 – 2.0
Reserved
<0101>, RW
Reserved:
Write as 0, ignore on read
36
Final
Version: DM9801A-DS-F01
May 30, 2001
Description
SPI Serial Management Status Register - Register 3 (INTFSEL = 1, GPSI Mode)
Bit
Bit Name
Default
3.7
INVRT_CRS
0, RW
Description
Invert CRS Signal:
When this bit is set the CRS signal on the DM9801A will be
inverted.
Invert COL Signal:
When this bit is set the COL signal on the DM9801A will be
inverted.
Invert Transmit Clock:
When this bit is set the TX_CLK signal on the DM9801A will be
inverted.
Invert Receive Clock:
When this bit is set the RX_CLK signal on the DM9801A will be
inverted.
Reserved:
Write as 0, ignore on read
Link Status:
This bit reports the Link Status of the DM9801A
Disable LED Stretchers:
This bit disables LED pulse stretchers
Reserved:
Write as 0, ignore on read
3.6
INVRT_COL
0, RW
3.5
INVRT_TXCLK
0, RW
3.4
INVRT_RXCLK
0, RW
3.3
Reserved
0, RW
3.2
LINK_STA
0, RO
3.1
DIS_LED_STR
0, RW
3.0
Reserved
0, RW
IMASKA (Interrupt Mask A) Register - Register 4 (INTFSEL = 1, GPSI Mode)
Bit
Bit Name
Default
4.7 – 4.4
Reserved
0,RW
Description
Reserved:
Write as 0, ignore on read
Mask Packet Received:
1= Packet Received will not activate the INT# pin
0= Packet Received will activate the INT# pin
Packet Transmitted:
1= Packet Transmitted will not activate the INT# pin
0= Packet Transmitted will activate the INT# pin
Remote Command Received:
1= Remote Command Received will not activate the INT# pin
0= Remote Command Received will activate the INT# pin
Remote Command Sent:
1= Remote Command Sent will not activate the INT# pin
0= Remote Command Sent will activate the INT# pin.
4.3
MSK_PKT_RCV
0,RW
4.2
MSK_PKT_XMIT
0,RW
4.1
MSK_RMT_RCV
0,RW
4.0
MSK_CMD_SNT
0,RW
IMASKB (Interrupt Mask B) Register - Register 5 (INTFSEL = 1, GPSI Mode)
Bit
Bit Name
Default
Description
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PDF描述 |
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| DM9801E | 1M home Phonrline Network Physical Layer Single Chip Transceiver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9801AE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:1M Home Phoneline Network Physical Layer Single Chip Transceiver |
| DM9801E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1M home Phonrline Network Physical Layer Single Chip Transceiver |
| DM9B | 功能描述:數(shù)字萬用表 4000 COUNT AUTO RoHS:否 制造商:Tektronix 產(chǎn)品:Multimeters 類型:Bench 準(zhǔn)確性:0.04 % 電壓范圍:2 V to 2 kV 電阻范圍: 電容范圍: 顯示計數(shù): 頻率:10 Hz to 45 Hz, 850 Hz to 1 MHz 測距: 真均方根值: 數(shù)據(jù)保持: |
| D-M9B | 制造商:SMC Corporation of America 功能描述:Sensor, solid state, direct mount, grommet connection, for MX/MH/CQ2/NCQ2/NCQ8 制造商:SMC 功能描述:2-Wire Auto Switch for 24Vdc Relay/PLC |
| D-M9BA | 制造商:SMC Corporation of America 功能描述:Autoswitch, water resistant, 2 wire, horizontal |
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