參數(shù)資料
型號(hào)： DDC101
英文描述： 20-BIT ANALOG-TO-DIGITAL CONVERTER
中文描述： 20位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 5/27頁
文件大?。?/td> 346K
代理商： DDC101
5
DDC101
SPECIFICATIONS
(CONT)
ELECTRICAL
All specifications with unipolar current input range, T
INT
= 1ms, correlated double sampling enabled, System Clock = 2MHz, V
REF
= –2.5V, T
A
= +25
°
C and V
S
=
±
5VDC,
unless otherwise noted.
DDC101
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY REQUIREMENTS
Operation
(5)
Quiescent Current, Positive Supply
Analog, V
S
+
Digital, V
+
Quiescent Current, Negative Supply
Operating Power
±
4.75
±
5
15.6
8.9
6.7
18.0
170
±
5.25
19.5
VDC
mA
mA
mA
mA
mW
V
S
+ = +5VDC, V
DD
+ = +5VDC
V
S
– = –5VDC
22.5
TEMPERATURE RANGE
Operating
Storage
–40
–60
+85
+100
°
C
°
C
NOTES: (1) Input = low level (less than 1% of Full Scale); Full Scale I
= 500nA; T
= 1ms; Unipolar Input Range; Acquisition Time = 16 clock cycles, Oversampling = 128. (2) Voltage input is converted through user
provided input resistor, R
. (3) FSR is Full Scale Range. (4) Gain Drift does not include the drift of the external reference. (5) V
+ must be less than or equal to V
+. See Section 7 for recommended connections. (6)
Straight Binary output code has slightly different Charge Range. See Section 6. (8) Input offset voltage is nulled by autozero circuitry and causes no output error. See Section 6 (Internal Error Correction). (9) This is
the maximum clock frequency at which SETUP codes can be written to and read from the DDC101. (10) For other input current and voltage configurations, see Discussion of Specifications and Detailed Theory of Operation
sections. (11) A best-fit straight line method is used to determine linearity. Two different best-fit straight lines are used for the two unipolar integral linearity specifications. Acquisition Time = 16 clock cycles, Oversampling
= 128.
Analog Inputs
Input Current............................................................100mA, momentary
Input Current.............................................................. 10mA, continuous
Input Voltage ................................................... V
S
+ +0.5V to V
S
– –0.5V
Power Supply
V
S
+ .................................................................................................. + 7V
V
S
– .................................................................................................... –7V
V
+ .................................................................................must be
≤
V
S
+
Maximum Junction Temperature ................................................... +165
°
C
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
THERMAL
RESISTANCE (
θ
JA
)
(
°
C/W)
PRODUCT
PACKAGE
DDC101U
24-Lead SOIC
239
100
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published
specifications.
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