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參數(shù)資料
| 型號： | DDC101 |
| 英文描述： | 20-BIT ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 20位模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 25/27頁 |
| 文件大小： | 346K |
| 代理商： | DDC101 |
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25
DDC101
FIGURE 25. DDC101 Equivalent Integrator Output for Single Integration with CDS.
Input Current Calculation
The following formula calculates the input current from the
actual DDC output:
With CDS:
Without CDS:
below: one with Correlated Double Sampling (CDS) and the
other without CDS. Each example assumes that the recom-
mended system clock frequency of 2MHz is used and that
the time between “Final Data point Start” commands, (the
integration time, T
INT
) is 1ms.
Example with CDS
. The Measurement Time with CDS is
calculated as the Integration Time (T
) of 1ms less T
and T
. T
, the oversampling time, is 1/2 of the Initial Data
Point time plus 1/2 the Final Data Point time since each
group of samples is averaged with the result at the midpoint
of each sample group.
Therefore, the Measurement Time = 1ms –(8 + 32 + 32)
μ
s
= 928
μ
s.
Example without CDS
. The Measurement Time without
CDS is calculated as the Total Integration Time (T
) of
1ms less T
ACQ
and T
OS
. T
OS
, the oversampling time, is 1/2 of
the Final Data Point time since this group of samples is
averaged with the result at the midpoint of the sample group.
Therefore, the Measurement Time = 1ms –(0.5 + 32)
μ
s
= 967.5
μ
s.
USER SETTING
(Clock Cycles)
MEASUREMENT
(Calculated)
FUNCTION
TIME
Integration Time (T
INT
)
Acquisition Time K
(T
ACQ
)
Initial Data Point
Samples, M
Measurement Time
Final Data Point
Samples, M
1ms
16
8
μ
s
128
64
μ
s
928
μ
s
128
64
μ
s
TABLE XVI. Measurement Time with CDS.
USER SETTING
(Clock Cycles)
MEASUREMENT
(Calculated)
FUNCTION
TIME
Integration Time (T
INT
)
Acquisition Time, K
(T
ACQ
) “No CDS”
Initial Data Point
Samples
Measurement Time
Final Data Point
Samples, M
1ms
1
0.5
μ
s
None
0
μ
s
967.5
μ
s
128
64
μ
s
TABLE XVII. Measurement Time without CDS.
i
=
500pC
DDCoutput
2
20
T
MEAS
i
=
500pC
DDCoutput
2
20
T
MEAS
i
=
500pC
DDCoutput
2
20
T
INT
– K clock periods – M / 2 clock periods
i
=
500pC
DDCoutput
2
20
T
INT
– K clock periods – M clock periods
X
X
Measurement Time
Digital
Output
M
Aquisition
Time, K
Oversampled
Initial Data Point
N
Tracking Interval
Time
Clock
Cycles
Final Data
Point Start
M
Oversampled
Final Data Point
DDC101 digital output is precise integration of input during measurement time.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DDC101P | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DDC101U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 20-Bit Anlg-to-Dig Converter RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| DDC101UG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 20-Bit Anlg-to-Dig Converter RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| DDC1021 | 制造商:MPSIND 制造商全稱:MPS Industries, Inc. 功能描述:3W, Wide Input Range SMD, Single & Dual Output DC/DC Converters |
| DDC1022 | 制造商:MPSIND 制造商全稱:MPS Industries, Inc. 功能描述:3W, Wide Input Range SMD, Single & Dual Output DC/DC Converters |
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