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參數(shù)資料
| 型號(hào)： | DC1011A-C |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2494 |
| 軟件下載： | QuikEval System |
| 設(shè)計(jì)資源： | DC1011A Schematic DC1011A Design Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 15 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2494 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2494IUHF#TRPBF-ND - IC ADC 16BIT W/PGA 38-QFN LTC2494CUHF#TRPBF-ND - IC ADC 16BIT W/PGA 38-QFN LTC2494CUHF#PBF-ND - IC ADC 16BIT W/PGA 38-QFN LTC2494IUHF#PBF-ND - IC ADC 16BIT W/PGA 38-QFN |
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LTC2494
2494fd
pin Functions
SDI (Pin 34): Serial Data Input. This pin is used to select the
gain, line frequency rejection mode, 1x or 2x speed mode,
temperature sensor, as well as the input channel. The serial
data input is applied under control of the serial clock (SCK)
during the data output/input operation. The first conversion
following a new input or mode change is valid.
fO (Pin 35): Frequency Control Pin. Digital input that
controls the internal conversion clock rate. When fO is
connected to GND, the converter uses its internal oscil-
lator running at 307.2kHz. The conversion clock may also
be overridden by driving the fO pin with an external clock
in order to change the output rate and the digital filter
rejection null.
CS (Pin 36): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the data output aborts the data transfer and starts
a new conversion.
SDO (Pin 37): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select pin is HIGH, the SDO pin is in a high
impedancestate.Duringtheconversionandsleepperiods,
this pin is used as the conversion status output. When
the conversion is in progress this pin is HIGH; once the
conversion is complete SDO goes LOW. The conversion
status is monitored by pulling CS LOW.
SCK(Pin38):Bidirectional,DigitalI/O,ClockPin.Ininternal
serial clock operation mode, SCK is generated internally
and is seen as an output on the SCK pin . In external serial
clock operation mode, the digital I/O clock is externally
applied to the SCK pin. The serial clock operation mode
is determined by the logic level applied to the SCK pin at
power-up and during the most recent falling edge of CS.
Exposed Pad (Pin 39): Ground. This pin is ground and
mustbesolderedtothePCBgroundplane.Forprototyping
purposes, this pin may remain floating.
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