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參數(shù)資料
| 型號： | DC1011A-A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 27/38頁 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2498 |
| 軟件下載： | QuikEval System |
| 設計資源： | DC1011A Schematic DC1011A Design Files |
| 標準包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2498 |
| 已供物品： | 板 |
| 相關產品： | LTC2498HUHF#TRPBF-ND - IC ADC 24BIT 16CH DELTA 38-QFN LTC2498HUHF#PBF-ND - IC ADC 24BIT 16CH DELTA 38-QFN LTC2498IUHF#TRPBF-ND - IC ADC 24BIT 16CH 38-QFN LTC2498CUHF#TRPBF-ND - IC ADC 24BIT 16CH 38-QFN LTC2498IUHF#PBF-ND - IC ADC 24BIT 16CH 38-QFN LTC2498CUHF#PBF-ND - IC ADC 24BIT 16CH 38-QFN |
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LTC2498
33
2498ff
applications inForMation
noise. Figures 26 and 27 show measurement results for
the rejection of a 7.5V peak-to-peak noise source (150%
of full scale) applied to the LTC2498. From these curves,
it is shown that the rejection performance is maintained
even in extremely noisy environments.
Using the 2x speed mode of the LTC2498 alters the rejec-
tion characteristics around DC and multiples of fS. The
device bypasses the offset calibration in order to increase
the output rate. The resulting rejection plots are shown
in Figures 28 and 29. 1x type frequency rejection can be
achieved using the 2x mode by performing a running
average of the conversion results, see Figure 30.
Output Data Rate
Whenusingitsinternaloscillator,theLTC2498producesup
to 7.5 samples per second (sps) with a notch frequency of
60Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (fO connected
to an external oscillator), the LTC2498 output data rate
can be increased. The duration of the conversion cycle is
41036/fEOSC. If fEOSC = 307.2kHz, the converter behaves
as if the internal oscillator is used.
AnincreaseinfEOSCoverthenominal307.2kHzwilltranslate
into a proportional increase in the maximum output data
rate (up to a maximum of 100sps). The increase in output
rate leads to degradation in offset, full-scale error, and ef-
fective resolution as well as a shift in frequency rejection.
Whenusingtheintegratedtemperaturesensor,theinternal
oscillator should be used (fO = 0) or an external oscillator
applied to fO, fEOSC, should be set to 307.2kHz Max.
A change in fEOSC results in a proportional change in the
internal notch position. This leads to reduced differential
Figure 26. Measure Input Normal Mode Rejection vs Input
Frequency with Input Perturbation of 150% (60Hz Notch)
Figure 27. Measure Input Normal Mode Rejection vs Input
Frequency With input Perturbation of 150% (50Hz Notch)
Figure 28. Input Normal Mode Rejection 2x Speed Mode
Figure 29. Input Normal Mode Rejection 2x Speed Mode
INPUT FREQUENCY (Hz)
0
15
30
45
60
75
90 105 120 135 150 165 180 195 210 225 240
NORMAL
MODE
REJECTION
(dB)
2498 F26
0
–20
–40
–60
–80
–100
–120
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
VIN(P-P) = 5V
VIN(P-P) = 7.5V
(150% OF FULL SCALE)
INPUT FREQUENCY (Hz)
0
NORMAL
MODE
REJECTION
(dB)
2498 F27
0
–20
–40
–60
–80
–100
–120
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
VIN(P-P) = 5V
VIN(P-P) = 7.5V
(150% OF FULL SCALE)
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
INPUT SIGNAL FREQUENCY (fN)
INPUT
NORMAL
REJECTION
(dB)
2498 F28
0
–20
–40
–60
–80
–100
–120
0
fN 2fN 3fN 4fN 5fN 6fN 7fN 8fN
INPUT SIGNAL FREQUENCY (fN)
INPUT
NORMAL
REJECTION
(dB)
2498 F29
0
–20
–40
–60
–80
–100
–120
250
248
252 254 256 258 260 262 264
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