| 型號 | 廠商 | 描述 |
| m74hc174rm13tr 2 3 4 5 6 7 8 9 10 11 |
意法半導(dǎo)體 | HEX D-TYPE FLIP FLOP WITH CLEAR |
| m74hc238rm13tr 2 3 4 5 6 7 8 9 10 |
意法半導(dǎo)體 | 3 TO 8 LINE DECODER |
| m74hc238ttr 2 3 4 5 6 7 8 9 10 |
意法半導(dǎo)體 | 3 TO 8 LINE DECODER |
| m74hc366f1r 2 3 4 5 6 7 8 9 10 11 |
意法半導(dǎo)體 | HEX BUS BUFFER 3-STATE HC365 NON INVERTING- HC366 INVERTING |
| m74hc366m1r 2 3 4 5 6 7 8 9 10 11 |
意法半導(dǎo)體 | HEX BUS BUFFER 3-STATE HC365 NON INVERTING- HC366 INVERTING |
| m74lcx16244dtr2g 2 3 4 5 6 7 8 |
ON SEMICONDUCTOR | Low−Voltage CMOS 16−Bit Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) |
| m74lcx16245dtr2g 2 3 4 5 6 7 8 |
ON SEMICONDUCTOR | Low−Voltage CMOS 16−Bit Transceiver With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) |
| m74lcx16373dtr2g 2 3 4 5 6 7 8 |
ON SEMICONDUCTOR | Low−Voltage CMOS 16−Bit Transparent Latch With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) |
| m74ls273p 2 3 4 |
Mitsubishi Electric Corporation | OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET |
| m74vhc132dtr2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Quad 2−Input NAND Schmitt Trigger |
| m74vhc1g125dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g125dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g125dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g126dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g126 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3-State Buffer(正相3態(tài)緩沖器) |
| m74vhc1g126dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g126dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting 3−State Buffer |
| m74vhc1g132dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2-Input NAND Schmitt-Trigger |
| m74vhc1g132 2 3 4 5 6 |
ON SEMICONDUCTOR | 2 Input NAND Schmitt Trigger(2輸入與非門施密特觸發(fā)器) |
| m74vhc1g132dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2-Input NAND Schmitt-Trigger |
| m74vhc1g132dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2-Input NAND Schmitt-Trigger |
| m74vhc1gt00dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NAND Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt00dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NAND Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt00dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NAND Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt02dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NOR Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt02dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NOR Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt02dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Single 2−Input NOR Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt04dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Inverting Buffer / CMOS Logic Level Shifter CMOS Logic Level Shifter |
| m74vhc1gt04dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Inverting Buffer / CMOS Logic Level Shifter CMOS Logic Level Shifter |
| m74vhc1gt04dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Inverting Buffer / CMOS Logic Level Shifter CMOS Logic Level Shifter |
| m74vhc1gt08dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input AND Gate/CMOS Logic Level Shifter |
| m74vhc1gt08dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input AND Gate/CMOS Logic Level Shifter |
| m74vhc1gt08dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input AND Gate/CMOS Logic Level Shifter |
| m74vhc1gt125df1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt125df2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt125dt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt126df1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt126df2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt126dt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| m74vhc1gt14dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Schmitt−Trigger Inverter / CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt14dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Schmitt−Trigger Inverter / CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt14dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Schmitt−Trigger Inverter / CMOS Logic Level Shifter LSTTL−Compatible Inputs |
| m74vhc1gt32dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input OR Gate/CMOS Logic Level Shifter |
| m74vhc1gt32dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input OR Gate/CMOS Logic Level Shifter |
| m74vhc1gt32dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | 2−Input OR Gate/CMOS Logic Level Shifter |
| m74vhc1gt50dft1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs |
| m74vhc1gt50dft2g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs |
| m74vhc1gt50dtt1g 2 3 4 5 6 |
ON SEMICONDUCTOR | Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs |
| m74vhc1gt66dft1g 2 3 4 5 6 7 8 9 10 |
ON SEMICONDUCTOR | SPST (NO) Normally Open Analog Switch |
| m74vhc1gt66dft2g 2 3 4 5 6 7 8 9 10 |
ON SEMICONDUCTOR | SPST (NO) Normally Open Analog Switch |