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參數(shù)資料
| 型號(hào)： | CY8C42123-24SXIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PDSO8 |
| 封裝： | 0.150 INCH, MS-012, SOIC-8 |
| 文件頁數(shù)： | 31/42頁 |
| 文件大?。?/td> | 954K |
| 代理商： | CY8C42123-24SXIT |
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CY8C42323/CY8C42423
PRELIMINARY
CY8C42123/CY8C42223
Document 38-12034 Rev. *C
Page 37 of 42
9.0
Thermal Considerations
The Power PSoC device can support a supply voltage up to
36V. An internal linear regulator provides the nominal 5 volts
used to power the M8C processor and other internal
resources. Because regulating to a lower voltage generates
excess heat, care must be taken to not exceed the maximum
junction temperature of the PSoC device when using higher
supply voltages.
The junction temperature depends on the ambient temper-
ature, the amount of power being dissipated in the device and
the thermal resistance (
θ
JA) of the package. In Linear Power
PSoC devices, dissipated power can be broken into four
sources: the PSoC core (CPU, PSoC blocks and system
resources), the General Purpose Inputs/Outputs (GPIO), and
the Gate Drive outputs (GD). The equation for junction temper-
ature is shown in Equation 1, where
θ
JA is the thermal resis-
tance of the device package.
TJ = TA + θJA * (PCore + PGPIO + PGD)
Equation 1
The core power dissipated in the PSoC is the supply voltage
(HVdd) times the combined current of: the CPU, digital blocks,
analog blocks and system resources (Idd). The equation for the
PSoC core power dissipation is:
PCore = HVdd * Idd
Equation 2
The power dissipated in the PSoC due to the GPIO can be
divided into two elements: current being sourced and current
being sunk. Because VOL is a relatively small value (less than
1V), the sinking current will not be a major contributor to heat
in the Power PSoC.
However, HVdd - VOH can be quite large and current sourced
by GPIO must be looked at carefully when using HVdd voltages
greater than 5V. The equation for GPIO power dissipation is
shown in Equation 3, where ISink is the total current being sunk
by GPIO pins, and ISource is the total current being sourced by
GPIO pins.
PGPIO = VOL * ISink + (HVdd - VOH) * ISource
Equation 3
The power dissipated by the high voltage Gate Drives (GD0
and GD1) is divided into a current sink and current source
element. With the GD pins, the (HVdd - VOHGD) component is
relatively small and the VOLGD component can be large
(approximately HVdd - 5V). Therefore, with the GD pins, care
must be taken to consider the effects of sinking currents. The
equation for GD power dissipation is shown in Equation 4,
where ISinkGD is the total current sunk by the GD pins, and
ISourceGD is the total current sourced by the GD pins.
PGD = VOLGD * ISinkGD + (HVdd - VOHGD) * ISourceGD
Equation 4
The following figures show the effects of supply voltage and
current on the temperature of the PSoC. Figure 9-1a shows
the maximum current with a varied supply voltage at an
ambient temperature of 70°C and Figure 9-1b shows the
maximum current with a varied supply voltage at an ambient
temperature of 85°C. The PSoC model used assumes Idd =
5mA and all other current is sourced by GPIO.
Each curve in the figures shows the maximum ISource that can
be tolerated (TJ remains below the maximum limit) at various
supply voltages between 2.5V and 36V, for a specific package.
The maximum current is clipped at 85 mA due to drive limita-
tions on the GPIO pins. The four package types available with
Linear Power PSoC devices are shown. Thermal resistance
(
Figure 9-1a. Maximum Current vs. Supply Voltage
by Package (70o Ambient)
Figure 9-1b. Maximum Current vs. Supply Voltage
by Package (85o Ambient)
0
10
20
30
40
50
60
70
80
90
010
20
30
HVdd
I dd
+
I
GP
IO
8-pin SOIC
32-pin MLF
16-pin SOIC
16-pin TSSOP
0
10
20
30
40
50
60
70
80
90
010
20
30
HVdd
I dd
+
I
GP
IO
8-pin SOIC
32-pin MLF
16-pin SOIC
16-pin TSSOP
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