
Contents
CY8C24xxx Preliminary Data Sheet
6
Document No. 38-12011 Rev. *E
December 22, 2003
13.1.18
13.1.19
13.1.20
13.1.21
13.1.22
13.1.23
13.1.24
13.1.25
13.1.26
13.1.27
13.1.28
13.1.29
13.1.30
13.1.31
13.1.32
13.1.33
13.1.34
13.1.35
13.1.36
13.1.37
13.1.38
13.1.39
13.1.40
13.1.41
13.1.42
13.1.43
13.1.44
13.1.45
13.1.46
13.1.47
13.1.48
13.1.49
13.1.50
13.1.51
13.1.52
13.1.53
13.1.54
13.1.55
13.1.56
13.1.57
13.1.58
13.1.59
13.1.60
13.1.61
13.1.62
13.1.63
13.1.64
13.1.65
13.1.66
CMP_CR0 ...................................................................................................105
ASY_CR .....................................................................................................106
CMP_CR1 ...................................................................................................107
ACBxxCR3 ..................................................................................................108
ACBxxCR0 ..................................................................................................109
ACBxxCR1 ..................................................................................................110
ACBxxCR2 ..................................................................................................111
ASCxxCR0 ..................................................................................................112
ASCxxCR1 ..................................................................................................113
ASCxxCR2 ..................................................................................................114
ASCxxCR3 ..................................................................................................115
ASDxxCR0 ..................................................................................................116
ASDxxCR1 ..................................................................................................117
ASDxxCR2 ..................................................................................................118
ASDxxCR3 ..................................................................................................119
RDIxRI ........................................................................................................120
RDIxSYN ....................................................................................................121
RDIxIS ........................................................................................................122
RDIxLT0 ......................................................................................................123
RDIxLT1 ......................................................................................................124
RDIxRO0 ...................................................................................................125
RDIxRO1 ....................................................................................................126
I2C_CFG .....................................................................................................127
I2C_SCR .....................................................................................................128
I2C_DR .......................................................................................................129
I2C_MSCR ..................................................................................................130
INT_CLR0 ...................................................................................................131
INT_CLR1 ...................................................................................................133
INT_CLR3 ...................................................................................................134
INT_MSK3 ..................................................................................................135
INT_MSK0 ..................................................................................................136
INT_MSK1 ..................................................................................................137
INT_VC .......................................................................................................138
RES_WDT ..................................................................................................139
DEC_DH .....................................................................................................140
DEC_DL ......................................................................................................141
DEC_CR0 ...................................................................................................142
DEC_CR1 ...................................................................................................143
MUL_X ........................................................................................................144
MUL_Y ........................................................................................................145
MUL_DH .....................................................................................................146
MUL_DL ......................................................................................................147
MAC_X/ACC_DR1 ......................................................................................148
MAC_Y/ACC_DR0 ......................................................................................149
MAC_CL0/ACC_DR3 ..................................................................................150
MAC_CL1/ACC_DR2 ..................................................................................151
CPU_F ........................................................................................................152
CPU_SCR1 .................................................................................................153
CPU_SCR0 .................................................................................................154
Bank 1 Registers................................................................................................................155
13.2.1
PRTxDM0 ...................................................................................................155
13.2.2
PRTxDM1 ...................................................................................................156
13.2.3
PRTxIC0 .....................................................................................................157
13.2.4
PRTxIC1 .....................................................................................................158
13.2