參數(shù)資料
型號(hào): CY39030V
英文描述: Programmable Logic
中文描述: 可編程邏輯
文件頁數(shù): 55/86頁
文件大?。?/td> 1212K
代理商: CY39030V
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 55 of 86
K25
K26
L1
L2
L3
L4
L11
L12
L13
L14
L15
L16
L23
L24
L25
L26
M1
M2
[19]
M3
[19]
M4
M11
M12
M13
M14
M15
M16
M23
M24
M25
M26
N1
N2
N3
[19]
N4
[19]
N11
N12
N13
N14
N15
N16
N23
[19]
N24
N25
N26
NC
NC
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
NC
IO/V
REF5
NC
NC
IO0
IO0
IO0
V
CCIO0
GND
GND
GND
GND
GND
GND
V
CCIO5
NC
NC
NC
NC
IO/V
REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
V
CCIO0
GND
GND
GND
GND
GND
GND
V
CCIO5
IO5
IO5
IO5
VCC
IO/V
REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
V
CCIO0
GND
GND
GND
GND
GND
GND
V
CCIO5
IO5
IO5
IO5
VCC
IO/V
REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V
REF5
IO5
IO5
IO0
IO0
IO0
V
CCIO0
GND
GND
GND
GND
GND
GND
V
CCIO5
IO5
IO5
IO5
VCC
IO/V
REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V
REF5
Table 12. 388 BGA Pin Table
(continued)
Pin
CY39050
CY39100
CY39165
CY39200
相關(guān)PDF資料
PDF描述
CY39165V Programmable Logic
CY39200V Programmable Logic
CY3930V208-200MGC CAP CER 1000PF 50V X7R 0805 FLEX
CY3950V208-200MGC CAP CER 10000PF 50V X7R 0805 FLX
CY39100V208-200MGC CAP CER .10UF 50V X7R 0805 FLEX
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY39030V208-125BBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39030V208-125BBI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39030V208-125BGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39030V208-125BGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39030V208-125MBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities