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| 型號： | CY2V9950 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時(shí)鐘和緩沖器 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 164K |
| 代理商： | CY2V9950 |
CY2V9950
Document #: 38-07436 Rev. **
Page 4 of 9
I
3
3-Level Input DC Current
HIGH, V
IN
= V
DD
MID, V
IN
= V
DD
/2
LOW, V
IN
= V
SS
V
IN
= V
SS
, V
DD
= Max
V
IN
= V
DD
, V
DD
= Max, (sOE#)
I
OL
= 12 mA (nQ[0:1])
I
OH
=
–
12 mA (nQ[0:1])
VDD = Max, TEST = MID, REF =
LOW, sOE# = LOW, Outputs not
loaded
@100 MHz
3-Level
Inputs
(TEST, FS,
nF[1:0])
–
200
50
–
–
100
0.4
–
μ
A
μ
A
μ
A
μ
A
μ
A
V
V
–
50
–
200
–
25
–
–
2.0
I
PU
I
PD
V
OL
V
OH
I
DDQ
Input Pull-up Current
Input Pull-down Current
Output LOW Voltage
Output HIGH Voltage
Quiescent Supply Current
–
2
mA
I
DD
C
IN
Dynamic Supply Current
Input Pin Capacitance
150
4
mA
pF
DC Electrical Specifications @ 3.3V
Parameter
V
DD
V
IL
V
IH
V
IHH[8]
V
IMM[8]
V
ILL[8]
I
IL
Description
Condition
Min.
2.97
–
2.0
Max.
3.63
0.8
–
–
Unit
V
V
V
V
V
V
μ
A
3.3 Operating Voltage
Input LOW Voltage
Input HIGH Voltage
Input HIGH Voltage
Input MID Voltage
Input LOW Voltage
Input Leakage Current
3.3V ± 10%
REF, FB, PE, and sOE# Inputs
3-Level Inputs
(TEST, FS, nF[1:0])
(These pins are normally wired to
VDD,GND or unconected)
V
IN
= V
DD
/G
ND
,V
DD
= Max
(REF, PE, and FB inputs)
V
DD
–
–
0.6
V
DD
/2
–
0.3 V
DD
/2 + 0.3
–
–
5
0.6
5
I
3
3-Level Input DC Current
HIGH, V
IN
= V
DD
MID, V
IN
= V
DD
/2
LOW, V
IN
= V
SS
V
IN
= V
SS
, V
DD
= Max
V
IN
= V
DD
, V
DD
= Max, (sOE#)
I
OL
= 12 mA, (nQ[0:1])
I
OH
=
–
12 mA, (nQ[0:1])
VDD = Max, TEST = MID, REF =
LOW, sOE# = LOW, outputs not
loaded
@100 MHz
3-Level
Inputs
(TEST, FS,
nF[1:0])
–
200
50
–
–
100
0.4
–
μ
A
μ
A
μ
A
μ
A
μ
A
V
V
–
50
–
200
–
100
–
–
2.4
I
PU
I
PD
V
OL
V
OH
I
DDQ
Input Pull-Up Current
Input Pull-Down Current
Output LOW Voltage
Output HIGH Voltage
Quiescent Supply Current
–
2
mA
I
DD
C
IN
Dynamic Supply Current
Input Pin Capacitance
230
4
mA
pF
AC Input Specifications
Parameter
T
R
,T
F
T
PWC
T
DCIN
F
REF
Description
Condition
Min.
–
2
10
6
12
24
Max.
10
–
90
50
100
200
Unit
ns/V
ns
%
Input Rise/Fall Time
Input Clock Pulse
Input Duty Cycle
Reference Input Frequency
0.8V
–
2.0V
HIGH or LOW
FS = LOW
FS = MID
FS = HIGH
MHz
DC Electrical Specifications @ 2.5V
(continued)
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2V9950AC | 制造商:Rochester Electronics LLC 功能描述:2.5/3.3V 200 MHZ LVCMOS INPUT, 8 OUTPUT ZDB - Bulk |
| CY2V9950ACT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5/3.3V 200-MHz Multi-Output Zero Delay Buffer |
| CY2V9950AI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5/3.3V 200-MHz Multi-Output Zero Delay Buffer |
| CY2V9950AIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5/3.3V 200-MHz Multi-Output Zero Delay Buffer |
| CY2V995AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:S2.5/3.3V 200-MHz Multi-Output Zero Delay Buffer |
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