參數(shù)資料
型號(hào): CY28159
英文描述: Clocks and Buffers
中文描述: 時(shí)鐘和緩沖器
文件頁數(shù): 6/13頁
文件大小: 144K
代理商: CY28159
CY28159
Document #: 38-07118 Rev. *A
Page 6 of 13
Buffer Characteristics
Current Mode CPU Clock Buffer Characteristics
The current mode output buffer detail and current reference
circuit details are contained elsewhere in this datasheet. The
following parameters are used to specify output buffer charac-
teristics:
1. Output impedance of the current mode buffer circuit - Ro
(see
Figure 4
)
2. Minimum and maximum required voltage operation range
of the circuit - Vop (see
Figure 4
).
3. Series resistance in the buffer circuit - Ros (see
Figure 4
)
4. .Current accuracy at given configuration into nominal test
load for given configuration
Iout is selectable depending on implementation. The parame-
ters above supply to all configurations. Vout is the voltage at
the pin of the device.
The various output current configurations are shown in the
host swing select functions table. For all configurations, the
deviation from the expected output current is ±7% as shown in
the table current accuracy.
1.2V
0V
Iout
Iout
Ros
Ro
VDD3 (3.3V +/- 5%)
Vout = 1.2V max
Vout
Figure 4.
Table 6. Host Clock (HSCL) Buffer Characteristics
Characteristics
Ro
Ros
Vout
Minimum
Maximum
3000 Ohms (recommended)
Unspecified
N/A
N/A
Unspecified
1.2 Volt
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