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參數(shù)資料
| 型號(hào)： | CY28159 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時(shí)鐘和緩沖器 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 144K |
| 代理商： | CY28159 |
CY28159
Document #: 38-07118 Rev. *A
Page 3 of 13
Test Load Configuration
The following shows test load configurations for the different Host Clock Outputs.(MULTsel1 = 0, MULTsel0 =1
Table 2. Group Offset Specifications
Group
CPU to 3V33
CPU to REF
Offset
Comments
No requirement
No requirement
Table 3. Group Limits and Parameters (Applicable to all
settings: Sel133/100#=x)
Output Name
CPU[(0:7)#]
REF
3V33
Max Load
See
Figure 1
20 pF
30 pF
CPUT
MULTSEL
T
PCB
T
PCB
CPUT#
33
33
Measurement Point
49.9
49.9
2pF
Measurement Point
2pF
221
VDD
Figure 1. 0.7V Test Load Termination
C
LOAD
Probe
Output Under Test
Figure 2. Lumped Load Termination
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相關(guān)代理商/技術(shù)參數(shù) |
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| CY28159PVC | 制造商:Rochester Electronics LLC 功能描述:FTG FOR SERVERWORKS GRAND CHAMPION CHIPSET - Bulk |
| CY28159PVCT | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Serverworks Grand Champion Chipset Applications |
| CY28159ZC | 制造商:Rochester Electronics LLC 功能描述:FTG FOR SERVERWORKS GRAND CHAMPION CHIPSET - Bulk |
| CY28159ZCT | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Serverworks Grand Champion Chipset Applications |
| CY2817-000 | 制造商:TE Connectivity 功能描述:55PC1143-12-MSL4-9CS3051 - Bulk |
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