參數(shù)資料
型號： CS5516-SD
英文描述： Analog-to-Digital Converter， 16-Bit
中文描述： 模擬到數(shù)字轉(zhuǎn)換器，16位
文件頁數(shù)： 5/26頁
文件大小： 499K
代理商： CS5516-SD
CS5510/11/12/13
DS337F1
5
ANALOG CHARACTERISTICS
(Continued)
Notes: 8.
VREF is referenced to V- and must be less than or equal to V+.
Due to current through the CS pin, I
V+
and I
V-
may not always be the same value.
All outputs unloaded. All inputs CMOS levels (> (V+ - 0.6 V) or < (V- + 0.6 V)).
CS must be inactive (logic high) during sleep to meet this power specification.
DIGITAL CHARACTERISTICS
(T
A
= 25° C; V
+
= 5 V
±
5%; V- = 0 V) (See Notes 1 and 12.)
9.
10.
11.
Notes: 12.
All measurements performed under static conditions.
V
L1
is 0.5 (V+ - V-) + 0.6 V + V-.
The CS signal provides the sink current path for the SDO pin when CS is low. The external drive logic
to CS, therefore, must be able to handle the logic-low current drive levels for all devices attached to
SDO. The voltage specified for SDO is relative to CS
Low
. See Section 2.3.1, “Digital Logic Levels”
and
Figure 11 for more details.
13.
14.
Parameter
Min
Typ
Max
Unit
Voltage Reference Input
Range
Input Capacitance
CVF current
Power Supplies
Supply Voltages
DC Power Supply Currents
{(VREF) - (V-)}
(Note 8) 0.250
2.5
7
6
(V+) - (V-)
-
-
V
pF
nA
-
-
{(V+) - (V-)}
4.75
5
5.25
V
(Note 9)
CS5510
CS5511
CS5512
CS5513
CS5510
CS5511
CS5512
CS5513
(Note 10)
CS5510
CS5511
CS5512
CS5513
(Note 11)
I
V+
I
V-
-
-
-
-
-
-
-
-
275
290
360
385
275
290
360
385
360
380
470
500
360
380
470
500
μA
μA
μA
μA
μA
μA
μA
μA
Power Consumption
Sleep
Power Supply Rejection
-
-
-
-
-
-
-
1.4
1.5
1.8
1.9
10
85
85
1.9
2.0
2.5
2.7
-
-
-
mW
mW
mW
mW
μW
dB
dB
dc Positive Supply
dc Negative Supply
Parameter
Symbol
V
IH
CS
Low
V
IL
I
CS
V
OH
V
OL
I
in
I
OZ
Min
Typ
-
-
-
-
-
-
±0.015
-
Max
-
V
L1
V
L1
1.0
-
Unit
V
V
V
mA
V
V
μA
μA
High-Level Input Voltage:
Low-Level Input Voltage:
CS and SCLK
(Note 13)
CS
V+ - 0.45
-
-
-
(V+) - 0.6
-
-
-
SCLK
Input Current:
High-Level Output Voltage:
Low-Level Output Voltage:
Input Leakage Current
3-State Leakage Current
(Note 14)
CS
SDO, I
source
= 5.0mA
(Note 14) SDO, I
sink
= 1.0mA
(
CS
Low
) + 0.6
±10
±10
SCLK
SCLK
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