參數(shù)資料
型號： CS4397-KSZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 14/34頁
文件大?。?/td> 0K
描述： IC DAC 24BIT MULTY STNDRD 28SOIC
標準包裝： 27
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
工作溫度： -10°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
供應商設備封裝： 28-SOIC
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極
采樣率（每秒）： 192k
其它名稱： 598-1066-5
CS4397
DS333F1
21
Common Mode Voltage - CMOUT
Pin 25, Output
Function:
Filter connection for internal bias voltage, typically 50% of VREF. Capacitors must be connected from
CMOUT to analog ground, as shown in Figure 6. CMOUT has a typical source impedence of 25 k
and
any current drawn from this pin will alter device performance
Reference Ground - FILT-
Pin 26, Input
Function:
Ground reference for the internal sampling circuits. Must be connected to analog ground.
Reference Filter - FILT+
Pin 27, Output
Function:
Positive reference for internal sampling circuits. External capacitors are required from FILT+ to analog
ground, as shown in Figure 6. The recommended values will typically provide 60 dB of PSRR at 1 kHz
and 40 dB of PSRR at 120 Hz. FILT+ is not intended to supply external current.
Voltage Reference Input- VREF
Pin 28, Input
Function:
Analog voltage reference. Typically 5VDC.
HARDWARE MODE
Mode Select - M0, M1, M2, M3, M4
Pins 2, 3, 4, 5 and 14, Inputs
Function:
The Mode Select pins determine the operational mode of the device as detailed in Tables 9-14. The op-
tions include;
Selection of the Digital Interface Format which determines the required relationship between the
Left/Right clock, serial clock and serial data as detailed in Figures 29-33
Selection of the standard 15
s/50 s digital de-emphasis filter response, Figure 28, which requires re-
configuration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample rates.
Selection of the appropriate clocking mode to match the input sample rates.
Access to the Direct Stream Digital Mode
Access to the 8x Interpolation Input Mode
CONTROL PORT MODE
Address Bit 0 / Chip Select - AD0 / CS
Pin 2, Input
Function:
In I2C mode, AD0 is a chip address bit. CS is used to enable the control port interface in SPI mode. The
device will enter the SPI mode at anytime a high to low transition is detected on this pin. Once the device
has entered the SPI mode, it will remain until either the part is reset or undergoes a power-down cycle.
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