參數(shù)資料
型號(hào)： CS4392-KZZ
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 8/40頁(yè)
文件大?。?/td> 0K
描述： IC DAC 24BIT 192KHZ W/VC 20TSSOP
標(biāo)準(zhǔn)包裝： 74
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 150mW
工作溫度： -10°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極
采樣率（每秒）： 200k
產(chǎn)品目錄頁(yè)面： 757 (CN2011-ZH PDF)
配用： CDB4392-ND - EVALUATION BOARD FOR CS4392
其它名稱： 598-1065-5
CS4392
16
DS459PP3
4.0.3
SPI Mode
In SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock,
CCLK (see Figure 9 for the clock to data relationship). There is no AD0 pin. Pin CS is the chip
select signal and is used to control SPI writes to the control port. When the device detects a high to
low transition on the AD0/CS pin after power-up, SPI mode will be selected. All signals are inputs
and data is clocked in on the rising edge of CCLK.
4.0.3a
SPI Write
To write to the device, follow the procedure below while adhering to the control port
Switching Specifications in section 7.
1) Bring CS low.
2) The address byte on the CDIN pin must then be 00100000.
3) Write to the memory address pointer, MAP. This byte points to the register to be written.
4) Write the desired data to the register pointed to by the MAP.
5) If the INCR bit (see section 4.0.1) is set to 1, repeat the previous step until all the desired
registers are written, then bring CS high.
6) If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is nec-
essary to bring CS high, and follow the procedure detailed from step 1. If no further writes
to other registers are desired, bring CS high.
4.1
Memory Address Pointer (MAP)
MAP
MSB
LS B
DATA
byte 1
byte n
R/W
MA P = Me mo ry A d dre s s P o in te r
ADDRESS
CH IP
CD IN
CC L K
CS
00 10 00 0
Figure 9. Control Port Timing, SPI mode
4.1.1 INCR (AUTO MAP INCREMENT ENABLE)
Default = ‘0’
0 - Disabled,
the MAP will stay constant for successive writes
1 - Enabled,
the MAP will auto increment after each byte is written, allowing block reads or
writes of successive registers
4.1.2 MAP3-0 (MEMORY ADDRESS POINTER)
Default = ‘0000’
76543210
INCR
Reserved
MAP3
MAP2
MAP1
MAP0
00000000
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