6.6.2 Soft Volume Ramp-up after Reset (Bit 3) Function: This function allows the user to control whether a sof" />
參數(shù)資料
型號： CS4392-KZZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 17/40頁
文件大?。?/td> 0K
描述： IC DAC 24BIT 192KHZ W/VC 20TSSOP
標(biāo)準(zhǔn)包裝： 74
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 150mW
工作溫度： -10°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極
采樣率（每秒）： 200k
產(chǎn)品目錄頁面： 757 (CN2011-ZH PDF)
配用： CDB4392-ND - EVALUATION BOARD FOR CS4392
其它名稱： 598-1065-5
CS4392
24
DS459PP3
6.6.2
Soft Volume Ramp-up after Reset (Bit 3)
Function:
This function allows the user to control whether a soft ramp up in volume is applied when reset is re-
leased either by the reset pin or internal to the chip. The modes are as follows:
0 - An instantaneous change is made from max attenuation to the control port volume setting on re-
lease of reset (default setting).
1 - Volume is ramped up using the soft-ramp settings in Bits 6:5 of register 02h (see 6.2.2) from max
attenuation to the control port volume setting on release of reset.
6.6.3
Soft Ramp-down before Reset (Bit 2)
Function:
This function allows the user to control if a soft ramp-down in volume is applied before a known reset
condition. The modes are as follows:
0 - An instantaneous change is made from the control port volume setting to max attenuation when
chip resets (default setting).
1 - Volume is ramped down using the soft-ramp settings in Bits 6:5 of register 02h (see 6.2.2) from
the control port volume setting to max attenuation when chip resets.
6.7
Chip ID - Register 07h
Function:
This register is Read-Only. Bits 7 through 4 are the part number ID which is 1000b (8h) and the re-
maining Bits (3 through 0) are for the chip revision.
B7
B6
B5
B4
B3
B2
B1
B0
PART3
PART2
PART1
PART0
REV3
REV2
REV1
REV0
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