參數(shù)資料
型號(hào): CS4384-CQZR
廠商: Cirrus Logic Inc
文件頁數(shù): 17/52頁
文件大小: 0K
描述: IC DAC 8CH 103DB 192KHZ 48-LQFP
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 模擬和數(shù)字
功率耗散(最大): 520mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 8 電壓,單極
采樣率(每秒): 216k
配用: 598-1525-ND - BOARD EVAL FOR CS4384 DAC
24
DS620F1
CS4384
4.3.3
OLM #3
OLM #3 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 256 Fs. Eight channels of MSB first 20-bit PCM data are input on SDIN1.
4.3.4
OLM #4
OLM #4 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 256 Fs. Eight channels of MSB first 24-bit PCM data are input on SDIN1.
4.3.5
TDM
The TDM serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave
to SCLK at 256 Fs. Data is received most significant bit first on the first SCLK after an LRCK transition
and is valid on the rising edge of SCLK. LRCK identifies the start of a new frame and is equal to the sample
rate, Fs. LRCK is sampled as valid on the rising SCLK edge preceding the most significant bit of the first
data sample and must be held valid for one SCLK period. Each time slot is 32 bits wide, with the valid data
sample left justified within the time slot with the remaining bits being zero padded.
LSB
MSB
20 clks
128 clks
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
DAC_A1
20 clks
Left Channel
Right Channel
128 clks
LRCK
SCLK
SDIN1
DAC_A2
DAC_A3
DAC_B1
DAC_B2
DAC_B3
LSB
MSB
20 clks
DAC_A4
LSB
MSB
20 clks
DAC_B4
Figure 17. Format 10 - One Line Mode 3
LSB
MSB
24 clks
128 clks
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
DAC_A1
24 clks
Left Channel
Right Channel
128 clks
LRCK
SCLK
SDIN1
DAC_A2
DAC_A3
DAC_B1
DAC_B2
DAC_B3
LSB
MSB
24 clks
DAC_A4
LSB
MSB
24 clks
DAC_B4
Figure 18. Format 11 - One Line Mode 4
DAC_B3
LRCK
SCLK
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
SDIN1
DAC_A1
DAC_B1
DAC_A3
DAC_A2
256 clks
32 clks
LSB
MSB
DAC_A4
32 clks
LSB
MSB
DAC_B2
32 clks
LSB
MSB
DAC_B4
32 clks
LSB
MSB
zero
Data
Figure 19. Format 12 - TDM Mode
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