參數(shù)資料
型號: CS4382A-DQZ
廠商: Cirrus Logic Inc
文件頁數(shù): 32/50頁
文件大?。?/td> 0K
描述: IC DAC 8CH 114DB 192KHZ 48-LQFP
標(biāo)準(zhǔn)包裝: 250
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 模擬和數(shù)字
功率耗散(最大): 680mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 16 電壓,單極
采樣率(每秒): 192k
配用: 598-1524-ND - BOARD EVAL FOR CS4382A DAC
38
DS618F2
CS4382A
from mute to the original volume value after a filter-mode change according to the settings of the Soft and
Zero Cross bits in the Mode Control 3 register. When disabled, an immediate mute and unmute is per-
formed.
Loss of clocks or a change in the FM bits will always cause an immediate mute; unmute in these condi-
tions is affected by the RMP_UP bit.
Note:
For best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.
6.5
Invert Control (Address 05h)
6.5.1
Invert Signal Polarity (Inv_Xx)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
6.6
Mixing Control Pair 1 (Channels A1 & B1)(Address 06h)
Mixing Control Pair 2 (Channels A2 & B2)(Address 09h)
Mixing Control Pair 3 (Channels A3 & B3)(Address 0Ch)
Mixing Control Pair 4 (Channels A4 & B4)(Address 0Fh)
6.6.1
Channel A Volume = Channel B Volume (A=B)
Default = 0
0 - Disabled
1 - Enabled
Function:
The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTAx and AOUTBx are deter-
mined by the A Channel Attenuation and Volume Control Bytes (per A-B pair), and the B Channel Bytes
are ignored when this function is enabled.
76
543
21
0
INV_B4
INV_A4
INV_B3
INV_A3
INV_B2
INV_A2
INV_B1
INV_A1
00
000
00
0
76
543
21
0
Px_A=B
PxATAPI4
PxATAPI3
PxATAPI2
PxATAPI1
PxATAPI0
PxFM1
PxFM0
00
100
10
0
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