參數(shù)資料
型號(hào)： CS42L52-DNZR
廠商： CIRRUS LOGIC INC
元件分類： 消費(fèi)家電
中文描述： SPECIALTY CONSUMER CIRCUIT, QCC40
封裝： 6 X 6 MM, LEAD FREE, MO-220, QFN-40
文件頁(yè)數(shù)： 28/59頁(yè)
文件大?。?/td> 1800K
代理商： CS42L52-DNZR
34
DS680F1
CS42L52
5/13/08
4.5.2.1
Maintaining a Desired Output Level
Using SPKxVOL, the speaker output level must first be attenuated by the decibel equivalent of the expect-
ed VP supply range (MAX relative to MIN). The CS42L52 then gradually reduces the attenuation as the
VP supply drops from its maximum level, maintaining a nearly constant power output.
Compensation Example 1 (VP Battery supply ranges from 4.5 V to 3.0 V)
1. Set speaker attenuation (SPKxVOL) to -3.5 dB. The VP supply changes ~3.5 dB.
2. Set the reference VP supply (VPREF) to 4.5 V.
3. Enable battery compensation (BATTCMP).
The CS42L52 automatically adjusts the output level as the battery discharges.
Compensation Example 2 (VP Battery supply ranges from 5.0 V to 1.6 V)
1. Set speaker attenuation (SPKxVOL) to -10 dB. The VP supply changes ~9.9 dB.
2. Set the reference VP supply (VPREF) to 5.0 V.
3. Enable battery compensation (BATTCMP).
The CS42L52 automatically adjusts the output level as the battery discharges. Refer to Figure 15 on page
34. In this example, the VP supply changes over a wide range, illustrating the accuracy of the CS42L52’s
battery compensation.
4.6
Serial Port Clocking
The CODEC serial audio interface port operates either as a slave or master, determined by the M/S bit. It
accepts externally generated clocks in Slave Mode and will generate synchronous clocks derived from an
input master clock (MCLK) in Master Mode. Refer to the tables below for the required setting in register 05h
and 06h associated with a given MCLK and sample rate.
Referenced Control
Register Location
VPREF ................................
SPKxVOL ............................
Referenced Control
Register Location
M/S
Register 05h
Register 06h
-24
-22
-20
-18
-16
-14
-12
-10
-8
-6
1.6
1.9
2.2
2.5
2.8
3.1
3.4
3.7
4
4.3
4.6
4.9
Uncompensated
PWM Output
Level
Battery Compensated
PWM Output Level
VP Supply (V)
P
W
M
O
u
tp
ut
L
e
v
el
(d
B)
Figure 15. Battery Compensation
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