參數(shù)資料
型號(hào): COP8SBR9
廠商: National Semiconductor Corporation
英文描述: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器,虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器)
中文描述: 8位CMOS閃存為基礎(chǔ)的32K的內(nèi)存,虛擬EEPROM和欠壓(8位基于的CMOS閃速存儲(chǔ)器的帶32K的存儲(chǔ)器,微控制器虛擬的EEPROM和電壓過(guò)低復(fù)位的微控制器)
文件頁(yè)數(shù): 35/68頁(yè)
文件大?。?/td> 714K
代理商: COP8SBR9
7.0 Power Saving Features
(Continued)
The user can select whether the trigger condition on the
selected L Port pin is going to be either a positive edge (low
to high transition) or a negative edge (high to low transition).
This selection is made via the register WKEDG, which is an
8-bit control register with a bit assigned to each L Port pin.
Setting the control bit will select the trigger condition to be a
negative edge on that particular L Port pin. Resetting the bit
selects the trigger condition to be a positive edge. Changing
an edge select entails several steps in order to avoid a
Wakeup condition as a result of the edge change. First, the
associated WKEN bit should be reset, followed by the edge
select change in WKEDG. Next, the associated WKPND bit
should be cleared, followed by the associated WKEN bit
being re-enabled.
An example may serve to clarify this procedure. Suppose we
wish to change the edge select from positive (low going high)
to negative (high going low) for L Port bit 5, where bit 5 has
previously been enabled for an input interrupt. The program
would be as follows:
RBIT
5, WKEN
; Disable MIWU
SBIT
5, WKEDG
; Change edge polarity
RBIT
5, WKPND
; Reset pending flag
SBIT
5, WKEN
; Enable MIWU
If the L port bits have been used as outputs and then
changed to inputs with Multi-Input Wakeup/Interrupt, a safety
procedure should also be followed to avoid wakeup condi-
tions. After the selected L port bits have been changed from
output to input but before the associated WKEN bits are
enabled, the associated edge select bits in WKEDG should
be set or reset for the desired edge selects, followed by the
associated WKPND bits being cleared.
This same procedure should be used following reset, since
the L port inputs are left floating as a result of reset.
The occurrence of the selected trigger condition for Multi-
Input Wakeup is latched into a pending register called
WKPND. The respective bits of the WKPND register will be
set on the occurrence of the selected trigger edge on the
corresponding Port L pin. The user has the responsibility of
clearing these pending flags. Since WKPND is a pending
register for the occurrence of selected wakeup conditions,
the device will not enter the HALT mode if any Wakeup bit is
both enabled and pending. Consequently, the user must
clear the pending flags before attempting to enter the HALT
mode.
WKEN and WKEDG are all read/write registers, and are
cleared at reset. WKPND register contains random value
after reset.
C
www.national.com
35
相關(guān)PDF資料
PDF描述
COP8SCR9 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器,虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器)
COP8SDR9 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器,虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器)
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