13.0 Instruction Set (Continued) 13.4.9 No-Operation Instruction The no-operation instruction does noth" />
參數(shù)資料
型號: COP8SAB7SLB9
廠商: National Semiconductor
文件頁數(shù): 39/62頁
文件大小: 0K
描述: IC MCU OTP 8BIT 2K 28LAMINATECSP
標(biāo)準(zhǔn)包裝: 1
系列: COP8™ 8SA
核心處理器: COP8
芯體尺寸: 8-位
速度: 10MHz
連通性: Microwire/Plus(SPI)
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 24
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 28-VFQFN,CSP
包裝: 剪切帶 (CT)
其它名稱: *COP8SAB7SLB9
COP8SAB7SLB9CT
13.0 Instruction Set (Continued)
13.4.9 No-Operation Instruction
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
No-Operation (NOP)
Note: The VIS is a special case of the Indirect Transfer of Control addressing
mode, where the double byte vector associated with the interrupt is
transferred from adjacent addresses in the program memory into the
program counter (PC) in order to jump to the associated interrupt
service routine.
13.5 REGISTER AND SYMBOL DEFINITION
The following abbreviations represent the nomenclature
used
in
the
instruction
description
and
the
COP8
cross-assembler.
Registers
A
8-Bit Accumulator Register
B
8-Bit Address Register
X
8-Bit Address Register
SP
8-Bit Stack Pointer Register
PC
15-Bit Program Counter Register
PU
Upper 7 Bits of PC
PL
Lower 8 Bits of PC
C
1 Bit of PSW Register for Carry
HC
1 Bit of PSW Register for Half Carry
GIE
1 Bit of PSW Register for Global Interrupt
Enable
VU
Interrupt Vector Upper Byte
VL
Interrupt Vector Lower Byte
Symbols
[B]
Memory Indirectly Addressed by B Register
[X]
Memory Indirectly Addressed by X Register
MD
Direct Addressed Memory
Mem
Direct Addressed Memory or [B]
Meml
Direct Addressed Memory or [B] or
Immediate Data
Imm
8-Bit Immediate Data
Reg
Register Memory: Addresses F0 to FF
(Includes B, X and SP)
Bit
Bit Number (0 to 7)
Loaded with
Exchanged with
COP8SA
Family
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