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參數(shù)資料
| 型號(hào)： | COP8CSDR9KMT7 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁(yè)數(shù)： | 69/80頁(yè) |
| 文件大?。?/td> | 972K |
| 代理商： | COP8CSDR9KMT7 |
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19.0 Instruction Set
(Continued)
19.7 INSTRUCTION EXECUTION TIME
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
See the BYTES and CYCLES per INSTRUCTION table for
details.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
[B]
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
Direct
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
Immed.
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
1/3
3/4
3/4
3/4
1/1
1/1
1/1
RPND
1/1
Instructions Using A & C
CLRA
INCA
DECA
LAID
DCORA
RRCA
RLCA
SWAPA
SC
RC
IFC
IFNC
PUSHA
POPA
ANDSZ
1/1
1/1
1/1
1/3
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/3
1/3
2/2
Transfer of Control Instructions
JMPL
JMP
JP
JSRL
JSR
JSRB
JID
VIS
RET
RETSK
RETI
INTR
NOP
3/4
2/3
1/3
3/5
2/5
2/5
1/3
1/5
1/5
1/5
1/5
1/7
1/1
Memory Transfer Instructions
Register
Indirect
[B]
1/1
1/1
Direct
Immed.
Register Indirect
Auto Incr. & Decr.
[B+, B]
1/2
1/2
[X]
1/3
1/3
[X+, X]
1/3
1/3
X A, (Note 17)
LD A, (Note 17)
LD B,Imm
LD B,Imm
LD Mem,Imm
LD Reg,Imm
IFEQ MD,Imm
2/3
2/3
2/2
1/1
2/2
(If B
<
16)
(If B
>
15)
2/2
3/3
2/3
3/3
2/2
Note 17:
=
>
Memory location addressed by B or X or directly.
C
www.national.com
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