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參數(shù)資料
| 型號： | COP8CSDR9KMT7 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 31/80頁 |
| 文件大?。?/td> | 972K |
| 代理商： | COP8CSDR9KMT7 |
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11.0 In-System Programming
(Continued)
Copy a block of data from RAM into flash program
memory.
Copy a block of data from program flash memory to RAM.
The following table lists the User ISP/Virtual E
2
commands,
required parameters and return data, if applicable. The com-
mand entry point is used as an argument to the JSRB
instruction.
Table 12
lists the Ram locations and Peripheral
Registers, used for User ISP and Virtual E
2
, and their ex-
pected contents. Please refer to the COP8 FLASH ISP User
Manual for additional information and programming ex-
amples on the use of User ISP and Virtual E
2
.
TABLE 11. User ISP/Virtual E
2
Entry Points
Command/
Label
cpgerase
Function
Command
Entry Point
0x17
Parameters
Return Data
Page Erase
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Accumulator A contains the
confirmation key 0x55.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
X pointer contains the beginning RAM
address where the result(s) will be
returned.
Register BYTECOUNTLO contains the
number of n bytes to read
(0
≤
n
≤
255). It is up to the user to
setup the segment register.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register ISPWR contains the Data
Byte to be written.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register BYTECOUNTLO contains the
number of n bytes to write (0
≤
n
≤
16).
The combination of the
BYTECOUNTLO and the ISPADLO
registers must be set such that the
operation will not cross a 64 byte
boundary.
X pointer contains the beginning RAM
address of the data to be written.
It is up to the user to setup the
segment register.
N/A
N/A (A page of memory beginning at
ISPADHI, ISPADLO will be erased)
cmserase
Mass Erase
0x1A
N/A (The entire Flash Memory will be
erased)
Data Byte in Register ISPRD.
creadbf
Read Byte
0x11
cblockr
Block Read
0x26
n Data Bytes, Data will be returned
beginning at a location pointed to by
the RAM address in X.
cwritebf
Write Byte
0x14
N/A
cblockw
Block Write
0x23
N/A
exit
EXIT
0x62
N/A (Device will Reset)
C
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| COP8-DM/888BC | 功能描述:開發(fā)板和工具包 - 其他處理器 COP8 DEBUG MODULE RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| COP8-DM/888CF | 功能描述:開發(fā)板和工具包 - 其他處理器 COP8 DEBUG MODULE RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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