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參數(shù)資料
| 型號： | CLC408AJE-TR13 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Comlinear CLC408 High-Speed, Low-Power Line Driver |
| 中文描述： | OP-AMP, 11000 uV OFFSET-MAX, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 199K |
| 代理商： | CLC408AJE-TR13 |
http://www.national.com
4
Typical Performance Characteristics
(A
v
= +2, R
f
= 1k
, R
L
= 100
,
V
CC
= +5V, T = 25°C, CLC408AJ
;
unless specified)
Long Term Settling Time
V
o
Time (s)
0.4
-0.4
1
μ
1m
1
0
10
μ
100
μ
10m
100m
-0.2
0.2
Closed Loop Output Resistance
O
)
Frequency (Hz)
100
0.1
10M
100M
10
1
Gain Flatness & Linear Phase Deviation
M
Frequency (Hz)
1M
10M
Gain
P
°
/
Phase
Small Signal Pulse Response
O
Time (10ns/div)
0.20
0.10
-0.20
0
-0.10
A
v
+2
A
v
-2
Large Signal Pulse Response
O
Time (10ns/div)
4.0
2.0
-4.0
0
-2.0
A
v
+2
A
v
-2
Short Term Settling Time
V
o
Time (s)
0.2
0.1
-0.2
0
20n
100n
0
-0.1
V
out
= 2V
step
40n
60n
80n
I
BI
, I
BN
, V
OS
vs. Temperature
O
O
Temperature (
°
C)
7.0
6.0
1.0
-50
0
100
5.0
4.0
3.0
2.0
V
OS
I
B
,
B
μ
A
3.5
3.0
1.5
1.0
0.5
2.5
2.0
50
I
BI
I
BN
Settling Time vs. Capacitive Load
S
CL (F)
70
60
30
20
10
100p
20p
1000p
50
40
R
)
60
50
20
10
0
40
30
R
s
0.05%
0.1%
CLC408 OPERATION
The CLC408 has a current-feedback (CFB) architecture
built in an advanced complementary bipolar process.
The key features of current-feedback are:
I
AC bandwidth is independent of voltage gain
I
Inherently unity-gain stability
I
Frequency response may be adjusted with
feedback resistor (R
f
in Figures 1-3)
I
High slew rate
I
Low variation in performance for a wide range
of gains, signal levels and loads
I
Fast settling
Current-feedback operation can be explained with a
simple model. The voltage gain for the circuits in Figures 1
and 2 is approximately:
V
V
in
where:
I
A
v
is the DC voltage gain
I
R
f
is the feedback resistor
I
Z(j
ω
) is the CLC408’s open-loop
transimpedance gain
Z j
R
f
I
is the loop gain
The denominator of the equation above is approximately
1 at low frequencies. Near the -3dB corner
frequency, the interaction between R
f
and Z(j
ω
)
dominates the circuit performance. Increasing R
f
does
the following:
I
Decreases loop gain
I
Decreases bandwidth
I
Reduces gain peaking
I
Lowers pulse response overshoot
I
Affects frequency response phase linearity
A
1
R
( )
ω
Z j
o
v
f
=
+
ω
( )
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC408AJP | Comlinear CLC408 High-Speed, Low-Power Line Driver |
| CLC408ALC | Comlinear CLC408 High-Speed, Low-Power Line Driver |
| CLC409AJP | JT 16C 16#16 SKT WALL RECP |
| CLC409AJE | Very Wideband, Low Distortion Monolithic Op Amp |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC408AJP | 制造商:Texas Instruments 功能描述: |
| CLC408ALC | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Comlinear CLC408 High-Speed, Low-Power Line Driver |
| CLC409 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Very Wideband, Low Distortion Monolithic Op Amp |
| CLC409 WAF | 制造商:Texas Instruments 功能描述: |
| CLC409AE-QML | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Feedback Operational Amplifier |
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