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參數(shù)資料
| 型號(hào)： | CLC408AJE-TR13 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Comlinear CLC408 High-Speed, Low-Power Line Driver |
| 中文描述： | OP-AMP, 11000 uV OFFSET-MAX, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 199K |
| 代理商： | CLC408AJE-TR13 |
http://www.national.com
10
where GBWP
U1
is the Gain-Bandwidth Product of
U1. As R
3
is made larger, f
UG
becomes smaller. f
UG
should be large enough so that U2’s 1/f noise does not
significantly impact the output noise.
Adjust R
7
so that the gain at f << f
UG
matches the gain at
f >> f
UG
.
Precision Half-Wave Rectifier
Figure 8 shows a precision half-wave rectifier. When
V
in
> 0, D
1
is on and D
2
is off. When V
in
< 0, D
1
is off and
D
2
is on. The second amplifier (U2) buffers V
o
from the
variable output impedance of the rectifier.
The output voltage is:
Figure 8: Precision Half-Wave Rectifier
Diodes D
1
and D
2
need to be Schottky or PIN diodes to
minimize delay.
Set R
2
= R
3
to the recommended feedback resistor value
for the gain A
v
= -R
2
/R
1
. R
2
and R
3
may need to be
increased slightly to compensate for the delays through
D
1
and D
2
.
Set R
6
to the recommended feedback resistor value for
the gain A
v
= (1 + R
6
/R
5
).
R
4
is an optional resistor; it helps isolate U2’s input from
the changing output impedance of U1.
Other configurations are possible:
1) Connect U2’s input between R
3
and D
2
so that
V
o
≠
0 for V
in
< 0.
2) Use an inverting gain configuration for U2 to
change the polarity of V
o
.
Pick the combination that best suits your needs.
R
3
-
CLC408
+
CLC408
-
R
1
V
in
R
6
+
R
2
R
4
U1
U2
V
o
D
2
D
1
R
5
V
0, V
0
R
R
1
R
R
V , V
0
o
in
2
1
6
5
in
=
<
+
>
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