- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384215 > CLC-CAPT-PCASM PDF資料下載
參數(shù)資料
| 型號： | CLC-CAPT-PCASM |
| 文件頁數(shù)： | 9/15頁 |
| 文件大小： | 763K |
| 代理商： | CLC-CAPT-PCASM |
9
http://www.national.com
The
menu window. Clicking the left mouse button selects the
desired port (the default Windows address and IRQ is
assumed). Clicking the
identi
fi
cation command out the selected port and listens
for the Capture board to echo back the command. This
function requires that DC power and data clock is
present. If the hardware is functional and the proper PC
port connected, the Con
fi
gure I/O window will then close
and return back to the user Control Panel. Capture Board
LED#6 will be lit if the data clock is present.
“Configure I/O”
button opens the user port option
“OK”
button sends an
If the incorrect serial port is selected or if the hardware is
dysfunctional (i.e. missing power or clock) the program
will return an error-warning window.
Click the
the other PC serial port in the
window or correct the hardware problem.
“OK”
button to clear the warning and then try
“I/O Configuration”
The
where the user can direct the location of the captured
data
fi
le. The desired
fi
le name and path can be typed
into the box. Clicking the left mouse on the button on the
right side of the
fi
le name box opens a standard browser
window to search for an appropriate
fi
le name. The
“Default”
button restores the default directory and
fi
le
name. The attached Matlab script analysis routines (*.m
fi
les) assume that the data is located at this location;
however, the user can edit the routines to load from the
appropriate location. Clicking the
the Capture program
’
s *.ini
fi
le and returns to the Capture
Control Panel.
“Change Data File”
button enables a dialog window
“OK”
button updates
The
window for the remainder of the con
fi
guration options.
After selecting the desired options, a left mouse click on
“OK”
stores the con
fi
guration variables and returns to
the Control Panel. Positioning the mouse pointer over the
Progress Bar inside the Control Panel pops up a text
bubble which displays the con
fi
guration variables used
when the Capture Program is started. Next is a discus-
sion of the Mode functions and the related sub-functions:
“Configure Capture”
button invokes the user dialog
MODES
There are four primary modes in which to run the data
capture system, each with its own associated options:
1.
Capture
mode con
fi
gures the Capture Board for
data reception from the DRCS evaluation board.
Both serial and the parallel output ports can be used
as the source data path.
a) The
24-Bits
option captures serial DRCS data
FROM
either of the two serial data ports. The
Capture 1st
Bit option should be selected for this
mode of data capture. With CLC5902 DDC in
“packed”
and
“mux_mode”
, the
AOUT
data
source contains both phases of both DDC channels.
The two
Channel
buttons select the desired DDC
channel to be stored in the SRAM. The four
Phase
buttons select either I or Q phase or the ordering of
alternating I/Q phases. In this latter case, the 32K
RAM space is shared. Therefore, only 16K points of
each phase are collected. If the
BOUT
data source
is selected, the CLC5902 DDC must be instructed
accordingly (i.e.
“
packed
”
and
“
mux_mode
”
off). With
the DDC in its default output format, the
BOUT
serial port is disabled.
b) The
Upper 16-Bits
and
Lower 16-Bits
options
enable the CLC5902 DDC
’
s parallel outputs. In this
con
fi
guration the DDC parallel output mux is
controlled by the FPGA through the 64 pin Euro
connector (be sure that the DRCS board SW1
“POUT”
switches are OFF/OPEN). The user
selects
Channel
and
Phase
and the FPGA instructs
the DDC which channel, phase, and which half of
the 32-bit output word to send out its parallel data
bus. This con
fi
guration uses the FIFO for temporary
data storage.
2.
Histogram
mode returns the Capture Board to the
24-bit serial data mode. As before, with the
CLC5902 DDC in
“
packed
”
and
“
mux_mode
”
, the
AOUT
data source contains both phases of both
DDC channels. A DDC change is required to enable
the
BOUT
. The
Capture 1st Bit
option should be
selected as before. In the
Histogram
con
fi
guration,
the program
Start
button
fi
rst sets every SRAM
location value to zero. The hardware then samples
the data, reads the value at that memory location,
increments the value, and writes back the updated
value. The process continues until one of the
memory values reach the target value set by SW1
相關PDF資料 |
PDF描述 |
|---|---|
| CLC109A8B | Analog Buffer/Voltage Follower |
| CLC109AIB | Analog Buffer/Voltage Follower |
| CLC110A8B | Analog Buffer/Voltage Follower |
| CLC111AIB | Analog Buffer/Voltage Follower |
| CLC114AIB | Analog Buffer/Voltage Follower |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CLCCF1 | 制造商:Dailys Limited 功能描述:LAB COAT M WHITE |
| CL-CD1190 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| CL-CD1190-10PC-C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Printer Controller |
| CL-CD1283-10QC-D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral (Multifunction) Controller |
| CL-CD1283-10QC-E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral (Multifunction) Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復。