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| 型號： | CDC930DL |
| 英文描述： | CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
| 中文描述： | CPU系統(tǒng)時鐘發(fā)生器| SSOP封裝| 56PIN |塑料 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 240K |
| 代理商： | CDC930DL |
CDC930
133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS
WITH 3-STATE OUTPUTS
SCAS641 – JULY 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
RL = 500
LOAD CIRCUIT of single-ended outputs for tpd and tsk
From Output
Under Test
CL
(see Note A)
RL = 500
S1
Vref(O)
OPEN
GND
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
Vref(OFF)
GND
TEST
S1
tw
Input
3 V
0 V
Vref(IH)
Vref(T)
Vref(IL)
From Output
Under Test
Test
Point
CL
(see Note A)
LOAD CIRCUIT of single-ended outputs for tr and tf
VOLTAGE WAVEFORMS
0 V
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
VOH
VOL
VDD
Vref(T)
Vref(T)
Vref(T)
tPZL
tPLZ
tPHZ
tPZH
Vref(T)
VOH – 0.3 V
VOL + 0.3 V
≈
3 V
≈
0 V
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Enable
(high-level
enabling)
tr
3 V
0 V
Vref(IH)
Vref(T)
Vref(IL)
Vref(T)
Vref(T)
tPLH
tPHL
tf
tw(H)
tw(L)
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. CL = 2 pF (HCLK, HCLK), CL = 20 pF (48MHZ, REF), CL = 30 pF (PCIx, 3VMREF, 3V66).
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
14.318 MHz, ZO = 50
, tr
≤
2.5 ns,
PARAMETER
3.3-V INTERFACE
2.5-V INTERFACE
UNIT
Vref(IH)
High-level reference voltage
2.4
2
V
Vref(IL)
Low-level reference voltage
0.4
0.4
V
Vref(T)
Input threshold reference voltage
1.5
1.25
V
Vref(OFF)
Off-state reference voltage
6
4.6
V
Figure 1. Load Circuit and Voltage Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
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| CDC930DLG4 | 功能描述:鎖相環(huán) - PLL 133-MHz Clock Synth/ Drvr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CDC930DLR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDC950 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS |
| CDC950DGG | 功能描述:時鐘合成器/抖動清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGG4 | 功能描述:時鐘合成器/抖動清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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