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參數(shù)資料
| 型號(hào)： | CDC9163 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PC Motherboard Clock Sythesizer/Drivers with SDRAM Clock Support(PC時(shí)鐘合成器/驅(qū)動(dòng)器(SDRAM 時(shí)鐘支持)) |
| 中文描述： | 電腦主板時(shí)鐘Sythesizer /支持與SDRAM時(shí)鐘驅(qū)動(dòng)器（電腦時(shí)鐘合成器/驅(qū)動(dòng)器（SDRAM的時(shí)鐘支持）） |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 177K |
| 代理商： | CDC9163 |
CDC9163
PC CLOCK SYNTHESIZER/DRIVER
WITH SDRAM CLOCK SUPPORT
SCAS574 – JULY 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
From Output
Under Test
CL
(see Note A)
Duty Cycle
3.3-V CLOCK WAVEFORMS
tr
tf
t(L)
tc
2.4 V
1.5 V
0.4 V
tP
t(H)
NOTES: A. CL includes probe and jig capacitance.
– CL = 20pF (CPUn, REF1, SBCLK, FCCLK)
– CL = 30pF (PCIn)
– CL = 45pF (REF0)
B. All input pulses are supplied by generators having the following characteristics: PRR
tf
≤
2.5 ns.
C. The outputs are measured one at a time with one transition per measurement.
10 MHz, ZO = 50
, tr
≤
2.5 ns,
Figure 1. Load Circuit and Voltage Waveforms
P
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