參數(shù)資料
型號(hào): CDC2510APWRG4
廠商: Texas Instruments, Inc.
英文描述: 3.3-V PHASE-LOCK LOOP CLOCK DRIVER
中文描述: 3.3 - V相位鎖相環(huán)時(shí)鐘驅(qū)動(dòng)器
文件頁數(shù): 6/13頁
文件大?。?/td> 311K
代理商: CDC2510APWRG4
SCAS604C APRIL 1998 REVISED DECEMBER 2004
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
LOAD CIRCUIT FOR OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tpd
50% VCC
3 V
0 V
VOH
VOL
Input
0.4 V
2 V
tr
tf
0.4 V
2 V
Output
500
50% VCC
30 pF
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
100 MHz, ZO = 50
, tr
1.2 ns, tf
1.2 ns.
C. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
tsk(o)
tsk(o)
tphase error
CLKIN
FBIN
Any Y
Any Y
Any Y
FBOUT
Figure 2. Phase Error and Skew Calculations
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