參數(shù)資料
型號(hào): CDB4384
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 17/52頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL FOR CS4384 DAC
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 8
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: CS4384
產(chǎn)品目錄頁(yè)面: 757 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: CS4384-CQZR-ND - IC DAC 8CH 103DB 192KHZ 48-LQFP
598-1062-ND - IC DAC 8CH 103DB 192KHZ 48LQFP
其它名稱: 598-1525
24
DS620F1
CS4384
4.3.3
OLM #3
OLM #3 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 256 Fs. Eight channels of MSB first 20-bit PCM data are input on SDIN1.
4.3.4
OLM #4
OLM #4 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 256 Fs. Eight channels of MSB first 24-bit PCM data are input on SDIN1.
4.3.5
TDM
The TDM serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave
to SCLK at 256 Fs. Data is received most significant bit first on the first SCLK after an LRCK transition
and is valid on the rising edge of SCLK. LRCK identifies the start of a new frame and is equal to the sample
rate, Fs. LRCK is sampled as valid on the rising SCLK edge preceding the most significant bit of the first
data sample and must be held valid for one SCLK period. Each time slot is 32 bits wide, with the valid data
sample left justified within the time slot with the remaining bits being zero padded.
LSB
MSB
20 clks
128 clks
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
DAC_A1
20 clks
Left Channel
Right Channel
128 clks
LRCK
SCLK
SDIN1
DAC_A2
DAC_A3
DAC_B1
DAC_B2
DAC_B3
LSB
MSB
20 clks
DAC_A4
LSB
MSB
20 clks
DAC_B4
Figure 17. Format 10 - One Line Mode 3
LSB
MSB
24 clks
128 clks
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
DAC_A1
24 clks
Left Channel
Right Channel
128 clks
LRCK
SCLK
SDIN1
DAC_A2
DAC_A3
DAC_B1
DAC_B2
DAC_B3
LSB
MSB
24 clks
DAC_A4
LSB
MSB
24 clks
DAC_B4
Figure 18. Format 11 - One Line Mode 4
DAC_B3
LRCK
SCLK
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
SDIN1
DAC_A1
DAC_B1
DAC_A3
DAC_A2
256 clks
32 clks
LSB
MSB
DAC_A4
32 clks
LSB
MSB
DAC_B2
32 clks
LSB
MSB
DAC_B4
32 clks
LSB
MSB
zero
Data
Figure 19. Format 12 - TDM Mode
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