參數(shù)資料
型號(hào): CD40101BMS
廠商: Intersil Corporation
英文描述: CMOS 9-Bit Parity Generator/Checker(抗輻射9位奇偶發(fā)生器校驗(yàn)器)
中文描述: 的CMOS 9位奇偶發(fā)生器/檢查(抗輻射9位奇偶發(fā)生器校驗(yàn)器)
文件頁(yè)數(shù): 8/8頁(yè)
文件大?。?/td> 105K
代理商: CD40101BMS
1293
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
CD40101BMS
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10
-3
inch).
METALLIZATION:
PASSIVATION:
BOND PADS:
DIE THICKNESS:
Thickness: 11k
14k
, AL.
10.4k - 15.6k
, Silane
0.004 inches X 0.004 inches MIN
0.0198 inches - 0.0218 inches
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