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參數(shù)資料
| 型號： | CC2420 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| 中文描述： | 2.4 GHz IEEE 802.15.4標(biāo)準(zhǔn)/ ZigBee功能的RF收發(fā)器 |
| 文件頁數(shù)： | 38/87頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | CC2420 |
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SmartRF
CC2420
Clear Channel Assessment section on
page 49 for details on
CCA
.
The preamble sequence is started 12
symbol periods after the command strobe.
After the programmable start of frame
delimiter has been transmitted, data is
fetched from the TXFIFO.
A TXFIFO underflow is issued if too few
bytes
are
written
Transmission
is
stopped. The underflow is indicated in the
TX_UNDERFLOW
status bit, which is
returned during each address byte and
each byte written to the TXFIFO. The
underflow bit is only cleared by issuing a
SFLUSHTX
command strobe.
to
the
automatically
TXFIFO.
then
The TXFIFO can only contain one data
frame at a given time.
After complete transmission of a data
frame, the TXFIFO is automatically refilled
with the last transmitted frame. Issuing a
new
STXON
or
STXONCCA
command
strobe will then cause
CC2420
to retransmit
the last frame.
Writing to the TXFIFO after a frame has
been transmitted will cause the TXFIFO to
be automatically flushed before the new
byte is written. The only exception is if a
TXFIFO underflow has occurred, when a
SFLUSHTX
command strobe is required.
Buffered receive mode
In buffered receive mode (RX_MODE 0),
the 128 byte RXFIFO, located in
CC2420
RAM, is used to buffer data received by
the demodulator. Accessing data in the
RXFIFO is described in the FIFO access
section on page 29.
The
FIFO
and
FIFOP
pins are used to
assist the microcontroller in supervising
the RXFIFO. Please note that the
FIFO
and
FIFOP
pins are only related to the
RXFIFO, even if
CC2420
is in transmit
mode.
Multiple data frames may be in the
RXFIFO simultaneously, as long as the
total number of bytes does not exceed
128.
See the RXFIFO overflow section on page
31 for details on how a RXFIFO overflow
is detected and signaled.
Un-buffered, serial mode
Un-buffered mode should be used for
evaluation / debugging purposes only.
Buffered mode is recommended for all
applications.
In un-buffered mode, the
FIFO
and
FIFOP
pins are reconfigured as data and data
clock pins. The TXFIFO and RXFIFO
buffers are not used in this mode. A
synchronous data clock is provided by
CC2420
at the
FIFOP
pin, and the
FIFO
pin is used as data input/output. The
FIFOP
clock frequency is 250 kHz when
active. This is illustrated in Figure 21.
In
(
MDMCTRL1.TX_MODE
=1),
synchronisation sequence is inserted at
the start of each frame by hardware, as in
buffered mode. Data is sampled by
CC2420
on the positive edge of
FIFOP
and should
be updated by the microcontroller on the
negative edge of
FIFOP
. See Figure 21
for an illustration of the timing in serial
transmit mode. The
SFD
and
CCA
pins
retain their normal operation also in serial
mode.
CC2420
will remain in serial transmit
mode until transmission is turned off
manually.
serial
transmit
mode
a
In
(
MDMCTRL1.RX_MODE
=1)
synchronisation is still performed by
CC2420
. This means that the
FIFOP
clock
pin will remain idle low until a start of
frame delimiter has been detected.
serial
receive
mode
byte
Chipcon AS
SmartRF
CC2420 Preliminary Datasheet (rev 1.2), 2004-06-09
Page 38 of 87
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相關(guān)代理商/技術(shù)參數(shù) |
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| CC2420/T&R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| CC2420/TR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| CC2420DBK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 DEMO KIT 2 DEMO BOARDS RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
| CC2420DK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 DEVELOPMENT KIT RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
| CC2420EMK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 EVALUATION KT (2)PCBs & (2)ANTENNA RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
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