參數(shù)資料
型號(hào): CC2420
廠商: Electronic Theatre Controls, Inc.
英文描述: 2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver
中文描述: 2.4 GHz IEEE 802.15.4標(biāo)準(zhǔn)/ ZigBee功能的RF收發(fā)器
文件頁數(shù): 30/87頁
文件大?。?/td> 1418K
代理商: CC2420
SmartRF
CC2420
is that FIFO and RAM access must be
terminated by setting
CSn
high.
CSn
SI
ADDR
ADDR
DATA
8MSB
DATA
8LSB
DATA
ADDR+1
SO
ADDR
TXFIFO
DATA
ADDR
DATA
ADDR+2
Status
Status
-
-
Status
Status
Status
Status
Command
Strobe
Register
Read
TXFIFO
Write
Figure 10. Multiple SPI Access Example
Microcontroller Interface and Pin Description
When used in a typical system,
CC2420
will
interface
to
a
microcontroller.
microcontroller must be able to:
This
Program
CC2420
into different modes,
read and write buffered data, and read
back status information via the 4-wire
SPI-bus configuration interface (
SI
,
SO
,
SCLK
and
CSn
).
Interface to the receive and transmit
FIFOs using the
FIFO
and
FIFOP
status pins.
Interface to the
CCA
pin for clear
channel assessment.
Interface to the
SFD
pin for timing
information (particularly for beaconing
networks).
Configuration interface
A
CC2420
to microcontroller interface
example is shown in Figure 11. The
microcontroller uses 4 I/O pins for the SPI
configuration interface (
SI
,
SO
,
SCLK
and
CSn
).
SO
should be connected to an input
at the microcontroller.
SI
,
SCLK
and
CSn
must
be
microcontroller
Preferably the microcontroller should have
a hardware SPI interface.
outputs.
The microcontroller pins connected to
SI
,
SO
and
SCLK
can be shared with other
SPI-interface devices.
SO
is a high
impedance output as long as
CSn
is not
activated (active low).
CSn
should have an external pull-up
resistor or be set to a high level when the
voltage regulator is turned off in order to
prevent the input from floating.
SI
and
SCLK
should be set to a defined level to
prevent the inputs from floating.
Chipcon AS
SmartRF
CC2420 Preliminary Datasheet (rev 1.2), 2004-06-09
Page 30 of 87
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