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參數(shù)資料
| 型號(hào)： | CC2420 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| 中文描述： | 2.4 GHz IEEE 802.15.4標(biāo)準(zhǔn)/ ZigBee功能的RF收發(fā)器 |
| 文件頁數(shù)： | 31/87頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | CC2420 |
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SmartRF
CC2420
CC2420
μ
C
CSn
SI
SO
SCLK
MOSI
MISO
SCLK
GIO2
FIFO
FIFOP
CCA
SFD
GIO0
Interrupt
GIO1
Timer Capture
Figure 11. Microcontroller interface example
Receive mode
In receive mode, the
SFD
pin goes high
after the start of frame delimiter (SFD)
field has been completely received. If
address recognition is disabled or is
successful, the
SFD
pin goes low again
only after the last byte of the MPDU has
been received. If the received frame fails
address recognition, the
SFD
pin goes low
immediately. This is illustrated in Figure
12.
The
FIFO
pin is high when there is one or
more data bytes in the RXFIFO. The first
byte to be stored in the RXFIFO is the
length field of the received frame, i.e. the
FIFO
pin is set high when the length field
is written to the RXFIFO. The
FIFO
pin
then remains high until the RXFIFO is
empty.
If
completely or partially inside the RXFIFO,
the
FIFO
pin will remain high until the
RXFIFO is empty.
a
previously
received
frame
is
The
FIFOP
pin is high when the number of
unread bytes in the RXFIFO exceeds the
threshold
programmed
IOCFG0.FIFOP_THR
.
recognition is enabled the
FIFOP
pin will
not go high until the incoming frame
passes address recognition, even if the
number of bytes in the RXFIFO exceeds
the programmed threshold.
The
FIFOP
pin will also go high when the
last byte of a new packet is received, even
into
When
address
if the threshold is not exceeded. If so the
FIFOP
pin will go back to low once one
byte has been read out of the RXFIFO.
When address recognition is enabled,
data should not be read out of the RXFIFO
before the address is completely received,
since the frame may be automatically
flushed by CC2420 if it fails address
recognition. This may be handled by using
the
FIFOP
pin, since this pin does not go
high until the frame passes address
recognition.
Figure 13 shows an example of pin activity
when reading a packet from the RXFIFO.
In this example, the packet size is 8 bytes,
IOCFG0.FIFOP_THR
MODEMCTRL0.AUTOCRC
is set. The length
will be 8 bytes, RSSI will contain the
average RSSI level during receiving of the
packet and FCS/corr contain information
of FCS check result and the correlation
levels.
=
3
and
RXFIFO overflow
The RXFIFO can only contain a maximum
of 128 bytes at a given time. This may be
divided between multiple frames, as long
as the total number of bytes is 128 or less.
If an overflow occurs in the RXFIFO, this
is signalled to the microcontroller by
setting the
FIFO
pin low while the
FIFOP
pin is high. Data already in the RXFIFO
will not be affected by the overflow, i.e.
frames already received may be read out.
A
SFLUSHRX
command strobe is required
after a RXFIFO overflow to enable
reception of new data. Note that the
Chipcon AS
SmartRF
CC2420 Preliminary Datasheet (rev 1.2), 2004-06-09
Page 31 of 87
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CC2420/T&R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| CC2420/TR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver |
| CC2420DBK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 DEMO KIT 2 DEMO BOARDS RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
| CC2420DK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 DEVELOPMENT KIT RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
| CC2420EMK | 功能描述:Zigbee/802.15.4開發(fā)工具 CC2420 EVALUATION KT (2)PCBs & (2)ANTENNA RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
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