參數資料
型號： C8051F010
廠商： Cygnal Technologies
英文描述： 20 MIPS,32k Flash,256 Ram,10bit ADC,64 Pin MCU(20 MIPS,32k 閃速存儲器,256 Ram,10位 ADC,64 腳 MCU)
中文描述： 20 MIPS的，32K閃存，256羊，10位ADC，64引腳微控制器（20 MIPS的，32K的閃速存儲器，256，羊，10位ADC和64腳微控制器）
文件頁數： 93/170頁
文件大?。?/td> 1294K
代理商： C8051F010
4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc.
2001
Page 93
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
13.1.
The C8051F000 family incorporates a power supply monitor that holds the MCU in the reset state until VDD rises
above the V
RST
level during power-up. (See Figure 13.2 for timing diagram, and refer to Table 13.1 for the
Electrical Characteristics of the power supply monitor circuit.) The /RST pin is asserted (low) until the end of the
100msec VDD Monitor timeout in order to allow the VDD supply to become stable.
On exit from a power-on reset, the PORSF flag (RSTSRC.1) is set by hardware to logic 1. All of the other reset
flags in the RSTSRC Register are indeterminate. PORSF is cleared by a reset from any other source. Since all resets
cause program execution to begin at the same location (0x0000), software can read the PORSF flag to determine if a
power-up was the cause of reset. The content of internal data memory should be assumed to be undefined after a
power-on reset.
13.2.
Software Forced Reset
Writing a 1 to the PORSF bit forces a Power-On Reset as described in Section 13.1.
Power-on Reset
Figure 13.2. VDD Monitor Timing Diagram
13.3.
When a power-down transition or power irregularity causes VDD to drop below V
RST
, the power supply monitor will
drive the /RST pin low and return the CIP-51 to the reset state (see Figure 13.2). When VDD returns to a level
above V
RST
, the CIP-51 will leave the reset state in the same manner as that for the power-on reset. Note that even
though internal data memory contents are not altered by the power-fail reset, it is impossible to determine if VDD
dropped below the level required for data retention. If the PORSF flag is set, the data may no longer be valid.
Power-fail Reset
/RST
t
v
1.0
2.0
Logic HIGH
Logic LOW
100ms
100ms
VDD
2.70
2.40
V
RST
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相關代理商/技術參數
參數描述
C8051F010DK 功能描述:開發(fā)板和工具包 - 8051 Dev Kit for F010-12 RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
C8051F010-GQ 功能描述:8位微控制器 -MCU 32KB 10ADC 64P MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F010-GQR 功能描述:8位微控制器 -MCU 32KB 10ADC 64Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F010R 功能描述:8位微控制器 -MCU C 10Bit 64Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F010TB 功能描述:開發(fā)板和工具包 - 8051 With C8051F010 MCU RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
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