參數(shù)資料
型號: C8051F010
廠商: Cygnal Technologies
英文描述: 20 MIPS,32k Flash,256 Ram,10bit ADC,64 Pin MCU(20 MIPS,32k 閃速存儲器,256 Ram,10位 ADC,64 腳 MCU)
中文描述: 20 MIPS的,32K閃存,256羊,10位ADC,64引腳微控制器(20 MIPS的,32K的閃速存儲器,256,羊,10位ADC和64腳微控制器)
文件頁數(shù): 51/170頁
文件大?。?/td> 1294K
代理商: C8051F010
4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc.
2001
Page 51
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
7. DACs, 12 BIT VOLTAGE MODE
The C8051F000 MCU family has two 12-bit voltage-mode Digital to Analog Converters. Each DAC has an output
swing of 0V to VREF-1LSB for a corresponding input code range of 0x000 to 0xFFF. Using DAC0 as an example,
the 12-bit data word is written to the low byte (DAC0L) and high byte (DAC0H) data registers. Data is latched into
DAC0 after a write to the corresponding DAC0H register,
so the write sequence should be DAC0L followed by
DAC0H
if the full 12-bit resolution is required. The DAC can be used in 8-bit mode by initializing DAC0L to the
desired value (typically 0x00), and writing data to only DAC0H with the data shifted to the left. DAC0 Control
Register (DAC0CN) provides a means to enable/disable DAC0 and to modify its input data formatting.
The DAC0 enable/disable function is controlled by the DAC0EN bit (DAC0CN.7). Writing a 1 to DAC0EN enables
DAC0 while writing a 0 to DAC0EN disables DAC0. While disabled, the output of DAC0 is maintained in a high-
impedance state, and the DAC0 supply current falls to 1uA or less. Also, the Bias Enable bit (BIASE) in the
REF0CN register (see Figure 9.2) must be set to 1 in order to supply bias to DAC0. The voltage reference for DAC0
must also be set properly (see Section 9).
In some instances, input data should be shifted prior to a DAC0 write operation to properly justify data within the
DAC input registers. This action would typically require one or more load and shift operations, adding software
overhead and slowing DAC throughput. To alleviate this problem, the data-formatting feature provides a means for
the user to program the orientation of the DAC0 data word within data registers DAC0H and DAC0L. The three
DAC0DF bits (DAC0CN.[2:0]) allow the user to specify one of five data word orientations as shown in the
DAC0CN register definition.
DAC1 is functionally the same as DAC0 described above. The electrical specifications for both DAC0 and DAC1
are given in Table 7.1.
Figure 7.1. DAC Functional Block Diagram
DAC0
+
-
AV+
12
AGND
8
8
REF
DAC0
D
DAC0EN
DAC0DF2
DAC0DF1
DAC0DF0
D
D
D
DAC1
+
-
AV+
12
AGND
8
8
REF
DAC1
D
DAC1EN
DAC1DF2
DAC1DF1
DAC1DF0
D
D
D
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C8051F010TB 功能描述:開發(fā)板和工具包 - 8051 With C8051F010 MCU RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: