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| 型號(hào)： | C8051F000 |
| 廠商： | Cygnal Technologies |
| 英文描述： | 20 MIPS,32k Flash,256 Ram,12bit ADC,64 Pin MCU(20 MIPS,32k 閃速存儲(chǔ)器,256 Ram,12位 ADC,64 腳 MCU) |
| 中文描述： | 20 MIPS的，32K閃存，256羊，12位ADC，64引腳微控制器（20 MIPS的，32K的閃速存儲(chǔ)器，256，羊，12位ADC和64腳微控制器） |
| 文件頁(yè)數(shù)： | 101/170頁(yè) |
| 文件大?。?/td> | 1294K |
| 代理商： | C8051F000 |
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4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc.
2001
Page 101
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
14.1.
If a crystal were used to generate the system clock for the MCU, the circuit would be as shown in Figure 14.1,
Option 1. For an ECS-110.5-20-4 crystal, the resonate frequency is 11.0592MHz, the intrinsic capacitance is 7pF,
and the ESR is 60
. The compensation capacitors should be 33pF each, and the PWB parasitic capacitance is
estimated to be 2pF. The appropriate External Oscillator Frequency Control value (XFCN) from the Crystal column
in the table in Figure 14.3 (OSCXCN Register) should be 111b.
When the crystal oscillator is enabled, a transient pulse may appear on XTAL2, the crystal driver output, that is
sufficient to cause the XTLVLD bit in OSCXCN to go to '1' before the crystal has actually started. Introducing a
blanking interval of 1ms between enabling the crystal oscillator and checking the XTLVLD bit will prevent a
premature switch to the external oscillator. The recommend procedure is:
1. Enable the external oscillator
2. Wait 1 ms
3. Poll for XTLVLD '0' ==> '1'
4. Switch to the external oscillator
Switching to the external oscillator before the crystal oscillator has stabilized could result in unpredictable behavior.
NOTE: Crystal oscillator circuits are quite sensitive to PCB layout. The crystal should be placed as close as possible
to the XTAL pins on the device, keeping the traces as short as possible and shielded with ground plane from any
other traces which could introduce noise or interference.
14.2.
External RC Example
If an external RC network were used to generate the system clock for the MCU, the circuit would be as shown in
Figure 14.1, Option 2. The capacitor must be no greater than 100pF, but using a very small capacitor will increase
the frequency drift due to the PWB parasitic capacitance. To determine the required External Oscillator Frequency
Control value (XFCN) in the OSCXCN Register, first select the RC network value to produce the desired frequency
of oscillation. If the frequency desired is 100kHz, let R = 246k
and C = 50pF:
f = 1.23(10
3
)/RC = 1.23(10
3
) / [246 * 50] = 0.1MHz = 100kHz
XFCN
≥
log
2
(f/25kHz)
XFCN
≥
log
2
(100kHz/25kHz) = log
2
(4)
XFCN
≥
2, or code 010
14.3.
External Capacitor Example
If an external capacitor were used to generate the system clock for the MCU, the circuit would be as shown in Figure
14.1, Option 3. The capacitor must be no greater than 100pF, but using a very small capacitor will increase the
frequency drift due to the PWB parasitic capacitance. To determine the required External Oscillator Frequency
Control value (XFCN) in the OSCXCN Register, select the capacitor to be used and find the frequency of oscillation
from the equations below. Assume AV+ = 3.0V and C = 50pF:
f = KF / (C * VDD) = KF / (50 * 3)
f = KF / 150
If a frequency of roughly 90kHz is desired, select the K Factor from the table in Figure 14.3 as KF = 13:
f = 13 /150 = 0.087MHz, or 87kHz
Therefore, the XFCN value to use in this example is 011.
External Crystal Example
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