參數(shù)資料
型號(hào): BUK102-50DL
廠商: NXP SEMICONDUCTORS
元件分類: 外設(shè)及接口
英文描述: PowerMOS transistor Logic level TOPFET
中文描述: 200 A BUF OR INV BASED PRPHL DRVR, PSFM3
封裝: PLASTIC, TO-220AB, SOT-78, SEP-3
文件頁(yè)數(shù): 5/10頁(yè)
文件大小: 85K
代理商: BUK102-50DL
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK102-50DL
ENVELOPE CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
L
d
Internal drain inductance
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
-
3.5
-
nH
L
d
Internal drain inductance
-
4.5
-
nH
L
s
Internal source inductance
-
7.5
-
nH
Fig.2. Normalised limiting power dissipation.
P
D
% = 100
P
D
/P
D
(25 C) = f(T
mb
)
Fig.3. Normalised continuous drain current.
I
D
% = 100
I
D
/I
D
(25 C) = f(T
mb
); conditions: V
IS
= 5 V
Fig.4. Safe operating area. T
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.5. Transient thermal impedance.
Z
th
j-mb
= f(t); parameter D = t
p
/T
0
20
40
60
80
100
120
140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1
100
VDS / V
1000
100
10
1
BUK102-50DL
10
ID & IDM / A
Overload protection characteristics not shown
DC
RDS(ON)=VDSID
100 us
1 ms
10 ms
100 ms
tp =
0
20
40
60
80
100
120
140
Tmb / C
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
BUK102-50DL
1E-07
1E-05
1E-03
t / s
1E-01
1E+01
Zth / (K/W)
10
1
0.1
0.01
0.001
0
0.5
0.2
0.1
0.05
0.02
D =
D =
t
p
t
p
T
T
P
D
t
April 1993
5
Rev 1.100
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