- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1990 > BU3076HFV-TR (Rohm Semiconductor)IC CLOCK GEN 1CH HVSOF6 PDF資料下載
參數(shù)資料
| 型號： | BU3076HFV-TR |
| 廠商： | Rohm Semiconductor |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN 1CH HVSOF6 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 時(shí)鐘/頻率發(fā)生器 |
| PLL： | 是 |
| 主要目的： | 數(shù)碼相機(jī) |
| 輸入： | 時(shí)鐘 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 67.5MHz |
| 電源電壓： | 2.85 V ~ 3.6 V |
| 工作溫度： | -5°C ~ 75°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-SMD |
| 供應(yīng)商設(shè)備封裝： | HVSOF6 |
| 包裝： | 帶卷 (TR) |
DS601F2
17
CS5340
Confidential Draft
3/11/08
4.2.3
Master Clock
The CS5340 requires a Master clock (MCLK) which runs the internal sampling circuits and digital filters.
There is also an internal MCLK divider which is automatically activated based on the speed mode and
frequency of the MCLK. Table 3 shows a listing of the external MCLK/LRCK ratios that are required.
Table 4 lists some common audio output sample rates and the required MCLK frequency. Please note
that not all of the listed sample rates are supported when operating with a fast MCLK (512x, 256x, 128x
for Single-, Double-, and Quad-Speed Modes, respectively).
4.3
Serial Audio Interface
The CS5340 supports both IS and Left-Justified serial audio formats. Upon start-up, the CS5340 will detect
the logic level on SDOUT (pin 4). A 10 k
pull-up to VL is needed to select IS format, and a 10 k pull-
down to GND is needed to select Left-Justified format. Figures 19 and 20 illustrate the IS and Left-Justified
audio formats. Please see Figures 13 through 16, for more information on the required timing for the two
serial audio interface formats. Also see Application Note AN282 for a detailed discussion of the serial audio
interface formats.
Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
MCLK/LRCK Ratio
256x, 512x
128x, 256x
64x*,128x
* Quad Speed, 64x only available in Master Mode.
Table 3. Master Clock (MCLK) Ratios
SAMPLE RATE (kHz)
MCLK (MHz)
32
8.192
44.1
11.2896
22.5792
48
12.288
24.576
64
8.192
88.2
11.2896
22.5792
96
12.288
24.576
192
12.288
24.576
Table 4. Master Clock (MCLK) Frequencies for Standard Audio Sample Rates
SD A T A
2 3 2 2
8
7
23 22
SCLK
LR C K
23 2 2
65
43
21
0
87
65
43
21
0
9
Left C hann el
R igh t C h a nne l
Figure 19. IS Serial Audio Interface
SD AT A
2 3 2 2
7
6
23 2 2
SC L K
L RCK
23 22
54
32
10
8
76
54
32
10
8
9
Le ft C h a n nel
R igh t C h annel
Figure 20. Left-Justified Serial Audio Interface
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CA3338AMZ96 | IC DAC 8BIT 50MSPS R-R 16-SOIC |
| CDCR83DBQG4 | IC DIRECT RAMBUS CLK GEN 24-QSOP |
| CDP68HC68T1M | IC RTC 32X8 NVSRAM CMOS 20-SOIC |
| CPLL66-1600-2200 | IC VCO PLL/SYNTH 2.2GHZ SMD |
| CPLL66-2175-2175 | IC VCO PLL/SYNTH 2175MHZ SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU307F | 制造商:ISC 制造商全稱:Inchange Semiconductor Company Limited 功能描述:isc Silicon NPN Power Transistor |
| BU3087FV-E | 制造商:ROHM 制造商全稱:Rohm 功能描述:Built in VCXO,Spread-Spectrum Clock Generator |
| BU3087FV-E2 | 制造商:ROHM Semiconductor 功能描述:PLL Clock Generator Single 16-Pin SSOP-B T/R |
| BU-30BL | 功能描述:測試電夾 BRLD MINI-GATOR CLIP RoHS:否 制造商:Pomona Electronics 類型:Minigrabber clip 顏色:Black |
| BU-30C | 功能描述:測試電夾 MIN-GATOR CLIP COP RoHS:否 制造商:Pomona Electronics 類型:Minigrabber clip 顏色:Black |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。