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參數(shù)資料
| 型號： | BR93LC46-W |
| 廠商： | Rohm CO.,LTD. |
| 英文描述： | 64】16bits serial EEPROM |
| 中文描述： | 64串行EEPROM】16位 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 94K |
| 代理商： | BR93LC46-W |
BR93LC46-W / BR93LC46F-W / BR93LC46RF-W /
Memory ICs
BR93LC46FJ-W / BR93LC46RFJ-W / BR93LC46FV-W
(5) Write enable (Fig.11)
These ICs are set to the write disabled state by the internal reset circuit when the power is turned on. Therefore,
before performing a write command, the write enable command must be executed. When this command is
executed, it remains valid until a write disable command is issued or the power supply is cut off. However, read
commands can be used in either the write enable or write disable state.
1
0
0
1
1
CS
SK
DI
DO
High Z
Fig.11 Write enable cycle timing
(6) Write (Fig.12)
This command writes the input 16 bits data (D15 to D0) to the specified address (A5 to A0). Actual writing of the data
begins after CS falls (following the 25th clock pulse after the start bit input), and D0 is in the Acquire state.
STATUS is not detected if CS = LOW after the time t
E / W
. When STATUS is detected (CS = HIGH), no commands are
accepted while DO is LOW (BUSY). Therefore, no commands should be input during this period.
CS
SK
DI
DO
High Z
0
1
1
A5
A4
A1
A0
D15
D14
D1
D0
1
2
4
9
10
25
STATUS
t
CS
READY
BUSY
t
SV
t
E / W
Fig.12 Write cycle timing (WRITE)
(STATUS)
After time tCS following the fall of CS, after input of the write command), if CS is set to HIGH, the write execute = BUSY
(LOW) and the command wait status READY (HIGH) are output.
If in the command wait status (STATUS = READY), the next command can be performed within the time t
E / W
. Thus, if
data is input via SK and DI with CS = HIGH in the t
E / W
period, erroneous operations may be performed. To avoid this,
make sure that DI = LOW when CS = HIGH. (Caution is especially important when common input ports are used.) This
applies to all of the write commands.
相關PDF資料 |
PDF描述 |
|---|---|
| BR93LC46F-W | 64】16bits serial EEPROM |
| BR93LC46FJ-W | 64】16bits serial EEPROM |
| BR93LC46RFJ-W | 64】16bits serial EEPROM |
| BRT1A | Quad Differential Receivers(四差分接收器) |
| BRF1A | Quad Differential Receivers(四差分接收器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| BR93LC56 | 制造商:ROHM 制造商全稱:Rohm 功能描述:2,048-Bit Serial Electrically Erasable PROM |
| BR93LC56A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microwire Serial EEPROM |
| BR93LC56AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microwire Serial EEPROM |
| BR93LC56F | 制造商:ROHM 制造商全稱:Rohm 功能描述:2,048-Bit Serial Electrically Erasable PROM |
| BR93LC56FJ-W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microwire Serial EEPROM |
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