
the V
threshold, the bq2060 sets the CVOV bit in Pack
Status and pulls theCFC pin toa logic low.
Low-Power Storage Mode
The bq2060 enters low-power mode 5– 8s after receiving
the E nable L ow-Power command. In this mode the
bq2060 consumes less than 10
μ
A. A rising edge on
SMBC, SMBD, or HDQ16 restores the bq2060 to the full
operating mode. The bq2060 does not perform any gas
gaugefunctions during low-power storagemode.
Device Reset
The bq2060 can be reset with commands over the
HDQ16 or SMBus. Upon reset, the bq2060 initializes its
internal registers with the information contained in the
configuration E E PROM. The following command se-
quenceinitiates a full bq2060 reset:
Write 0x4f to0xff5a
Write 0x7d to0x0000
Write 0x7d to0x0080
Communication
The bq2060 includes two types of communication ports:
SMBus and HDQ16. The SMBus interface is a 2-wire
bidirectional protocol using the SMBC (clock) and SMBD
(data) pins. T he H DQ16 interface is a 1-wire
bidirectional protocol using the HDQ16 pin. All three
communication lines are isolated from V
CC
 and may be
pulled-up higher than V
CC
. Also, the bq2060 will not
pull these lines low if V
CC
 to the part is zero . HDQ16
should bepulled down with a 100K
 resistor if not used.
The communication ports allow a host controller, an
SMBus compatible device, or other processor to access
the memory registers of the bq2060. In this way a sys-
tem can efficiently monitor and managethebattery.
SMBus
The SMBus interface is a command-based protocol. A
processor acting as the bus master initiates communica-
tion to the bq2060 by generating a START condition. A
START condition consists of a high-to-low transition of
the SMBD line while the SMBC is high. The processor
then sends the bq2060 device address of 0001011 (bits
7–1) plus a R/W bit (bit 0) followed by an SMBus com-
mand code. The R/W bit (LSB) and the command code
instruct the bq2060 to either store the forthcoming data
to a register specified by the SMBus command code or
output the data from the specified register. The proces-
sor completes the access with a STOP condition. A STOP
condition consists of a low-to-high transition of the
SMBD line while the SMBC is high. With SMBus, the
most-significant bit (MSB) of a data byte is transmitted
first.
In some instances, the bq2060 acts as the bus master.
This occurs when the bq2060 broadcasts charging re-
quirements and alarm conditions to device addresses
0x12 (SBS Smart Charger) and 0x10 (SBS Host Control-
ler.)
SMBus Protocol
Thebq2060 supports thefollowing SMBus protocols:
Read Word
WriteWord
Read Block
A processor acting as the bus master uses the three pro-
tocols to communicate with the bq2060. The bq2060 act-
ing as thebus master uses theWriteWord protocol.
The SMBD and SMBC pins are open drain and require
external pullup resistors.
SMBus Packet Error Checking
The bq2060 supports Packet Error Checking as a mecha-
nism to confirm proper communication between it and
another SMBus device. Packet Error Checking requires
that both the transmitter and receiver calculate a Packet
Error Code (PEC) for each communication message. The
device that supplies the last byte in the communication
message appends the PEC to the message. The receiver
compares the transmitted PEC to its PEC result to deter-
mineif thereis a communication error.
PEC Protocol
The bq2060 can receive or transmit data with or without
PEC.
Figure 4 shows the communication protocol for
the Read Word, Write Word, and Read Block messages
without PEC. Figure5 includes PEC.
In the Write Word protocol, the bq2060 receives the PEC
after the last byte of data from the host. If the host does
not support PEC, the last byte of data is followed by a
STOP condition. After receipt of the PEC, the bq2060
compares the value to its calculation. If the PEC is cor-
rect, the bq2060 responds with an ACKNOWLEDGE. If
it is not correct, the bq2060 responds with a NOT AC-
KNOWLEDGE and sets an error code.
In the Read Word and Block Read, the host generates an
ACKNOWLEDGE after the last byte of data sent by the
bq2060. The bq2060 then sends the PEC and the host
acting as a master-receiver generates a NOT AC-
KNOWLEDGE and a STOP condition.
13
bq2060