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參數(shù)資料
| 型號(hào)： | B300W35A102XYG |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 14/15頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR AUDIO 24BIT 35WLCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | BelaSigna® 300 |
| 類(lèi)型： | 音頻處理器 |
| 應(yīng)用： | 便攜式設(shè)備 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 35-VFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 35-WLCSP（3.63x2.68） |
| 包裝： | 帶卷 (TR) |
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BelaSigna 300
http://onsemi.com
8
WLCSP Assembly / Design Notes
For PCB manufacture with BelaSigna 300 WLCSP,
ON Semiconductor recommends solderonpad (SoP)
surface finish. With SoP, the solder mask opening should be
nonsolder maskdefined (NSMD) and copper pad
geometry will be dictated by the PCB vendor’s design
requirements.
Alternative surface finishes are ENiG and OSP; volume
of screened solder paste (#5) should be less than
0.0008 mm3. If no prescreening of solder paste is used,
then following conditions must be met:
1. the solder mask opening should be >0.3 mm in
diameter,
2. the copper pad will have 0.25 mm diameter, and
3. soldermask thickness should be less than 1 mil
thick above the copper surface.
ON Semiconductor can provide BelaSigna 300 WLCSP
land pattern CAD files to assist your PCB design upon
request.
WLCSP Weight
BelaSigna 300 WLCSP (B300W35A102XYG) has an average weight of 0.095 grams.
DFN Pin Out
A total of 44 active pins are present on the BelaSigna 300 DFN package. A description of these pins is given in Table 8.
Table 8. DFN PAD DESCRIPTIONS
Pad Index
BelaSigna 300 Pad Name
Description
I/O
A/D
15,22
GNDRCVR
Ground for output driver
N/A
A
16,21
VBATRCVR
Power supply for output stage
I
A
20
RCVR_HP+
Extra output driver pad for high power mode
O
A
19
RCVR+
Output from output driver
O
A
18
RCVR
Output from output driver
O
A
17
RCVR_HP
Extra output driver pad for high power mode
O
A
13
CAP0
Charge pump capacitor pin 0
N/A
A
14
CAP1
Charge pump capacitor pin 1
N/A
A
12
VDBL
Doubled voltage
O
A
11
VBAT
Power supply
I
A
10
VREG
Regulated supply voltage
O
A
9
AGND0
Analog ground 0
N/A
A
8
AGND1
Analog ground 1
N/A
A
2
AIR01
Input stage reference for channels 0 and 1
N/A
A
5
AIR23
Input stage reference for channels 2 and 3
N/A
A
7
AI4
Audio signal input 4
I
A
6
AI3/LOUT3
Audio signal input 3/output signal from preamp 3
I/O
A
4
AI2/LOUT2
Audio signal input 2/output signal from preamp 2
I/O
A
3
AI1/LOUT1
Audio signal input 1/output signal from preamp 1
I/O
A
1
AI0/LOUT0
Audio signal input 0/output signal from preamp 0
I/O
A
44
GPIO[4]/LSAD[4]
Generalpurpose I/O 4/low speed AD input 4
I/O
A/D
43
GPIO[3]/LSAD[3]
Generalpurpose I/O 3/low speed AD input 3
I/O
A/D
42
GPIO[2]/LSAD[2]
Generalpurpose I/O 2/low speed AD input 2
I/O
A/D
41
GPIO[1]/LSAD[1]/UARTRX
Generalpurpose I/O 1/low speed AD input 1/and UART RX
I/O
A/D
40
GPIO[0]/UARTTX
Generalpurpose I/O 0/UART TX
I/O
A/D
34
GNDC
Core logic ground
N/A
A
33
VDDC
Core logic power
O
A
39
GNDO
Digital ground
N/A
A
38
VDDO
Digital power
I
A
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