
156
2545T–AVR–05/11
ATmega48/88/168
Notes:
1. MAX= 0xFF
2. BOTTOM= 0x00
18.11.2
TCCR2B – Timer/counter control register B
Bit 7 – FOC2A: Force output compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2A output is
changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a
strobe. Therefore it is the value present in the COM2A1:0 bits that determines the effect of the
forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
Bit 6 – FOC2B: Force output compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is
changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a
strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the
forced compare.
Table 18-8.
Waveform generation mode bit description.
Mode
WGM2
WGM1
WGM0
Timer/counter
mode of
operation
TOP
Update of
OCRx at
TOV flag
0
Normal
0xFF
Immediate
MAX
10
0
1
PWM,
phase correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
Fast PWM
0xFF
BOTTOM
MAX
41
0
Reserved
–
51
0
1
PWM,
phase correct
OCRA
TOP
BOTTOM
61
1
0
Reserved
–
71
1
Fast PWM
OCRA
BOTTOM
TOP
Bit
7
6
5
4
3
2
1
0
FOC2A
FOC2B
–
WGM22
CS22
CS21
CS20
TCCR2B
Read/write
W
R
R/W
Initial value
0