
103
2545T–AVR–05/11
ATmega48/88/168
Note:
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
for more details.
Table 15-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
rect PWM mode.
Note:
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
Bits 3, 2 – Res: Reserved bits
These bits are reserved bits in the Atmel ATmega48/88/168 and will always read as zero.
Bits 1:0 – WGM01:0: Waveform generation mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Table 15-8. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Notes:
1. MAX
= 0xFF
2. BOTTOM = 0x00
Table 15-7.
Compare output mode, phase correct PWM mode
(1).
COM0B1
COM0B0
Description
0
Normal port operation, OC0B disconnected
01
Reserved
10
Clear OC0B on compare match when up-counting
Set OC0B on compare match when down-counting
11
Set OC0B on compare match when up-counting
Clear OC0B on compare match when down-counting
Table 15-8.
Waveform generation mode bit description.
Mode
WGM02
WGM01
WGM00
Timer/counter
mode of
operation
TOP
Update of
OCRx at
TOV flag
set on
0
Normal
0xFF
Immediate
MAX
10
0
1
PWM,
phase correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
Fast PWM
0xFF
BOTTOM
MAX
4
1
0
Reserved
–
51
0
1
PWM,
phase correct
OCRA
TOP
BOTTOM
6
1
0
Reserved
–
7
1
Fast PWM
OCRA
BOTTOM
TOP