
39
8018P–AVR–08/10
ATmega169P
“0011”, giving a division factor of 8 at start up. This feature should be used if the selected clock
source has a higher frequency than the maximum frequency of the device at the present operat-
ing conditions. Note that any value can be written to the CLKPS bits regardless of the CKDIV8
Fuse setting. The Application software must ensure that a sufficient division factor is chosen if
the selected clock source has a higher frequency than the maximum frequency of the device at
the present operating conditions. The device is shipped with the CKDIV8 Fuse programmed.
Table 8-13.
Clock Prescaler Select
CLKPS3
CLKPS2
CLKPS1
CLKPS0
Clock Division Factor
0
000
1
0
001
2
0
010
4
0
011
8
0
100
16
0
101
32
0
110
64
0
111
128
1
000
256
1
001
Reserved
1
010
Reserved
1
011
Reserved
1
100
Reserved
1
101
Reserved
1
110
Reserved
1
111
Reserved